gem5
[DEVELOP-FOR-23.0]
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#include <faults.hh>
Classes | |
struct | FaultVals |
Public Member Functions | |
ArmFault (ExtMachInst mach_inst=0, uint32_t _iss=0) | |
MiscRegIndex | getSyndromeReg64 () const |
MiscRegIndex | getFaultAddrReg64 () const |
void | invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override |
void | invoke32 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) |
void | invoke64 (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) |
void | update (ThreadContext *tc) |
bool | isResetSPSR () |
bool | vectorCatch (ThreadContext *tc, const StaticInstPtr &inst) |
ArmStaticInst * | instrAnnotate (const StaticInstPtr &inst) |
virtual void | annotate (AnnotationIDs id, uint64_t val) |
virtual FaultOffset | offset (ThreadContext *tc)=0 |
virtual FaultOffset | offset64 (ThreadContext *tc)=0 |
virtual OperatingMode | nextMode ()=0 |
virtual bool | routeToMonitor (ThreadContext *tc) const =0 |
virtual bool | routeToHyp (ThreadContext *tc) const |
virtual uint8_t | armPcOffset (bool is_hyp)=0 |
virtual uint8_t | thumbPcOffset (bool is_hyp)=0 |
virtual uint8_t | armPcElrOffset ()=0 |
virtual uint8_t | thumbPcElrOffset ()=0 |
virtual bool | abortDisable (ThreadContext *tc)=0 |
virtual bool | fiqDisable (ThreadContext *tc)=0 |
virtual ExceptionClass | ec (ThreadContext *tc) const =0 |
virtual bool | il (ThreadContext *tc) const =0 |
virtual uint32_t | iss () const =0 |
virtual uint32_t | vectorCatchFlag () const |
virtual bool | isStage2 () const |
virtual FSR | getFsr (ThreadContext *tc) const |
virtual void | setSyndrome (ThreadContext *tc, MiscRegIndex syndrome_reg) |
virtual bool | getFaultVAddr (Addr &va) const |
OperatingMode | getToMode () const |
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virtual FaultName | name () const =0 |
virtual | ~FaultBase () |
Static Public Attributes | |
static uint8_t | shortDescFaultSources [NumFaultSources] |
Encodings of the fault sources when the short-desc. More... | |
static uint8_t | longDescFaultSources [NumFaultSources] |
Encodings of the fault sources when the long-desc. More... | |
static uint8_t | aarch64FaultSources [NumFaultSources] |
Encodings of the fault sources in AArch64 state. More... | |
Protected Member Functions | |
virtual Addr | getVector (ThreadContext *tc) |
Addr | getVector64 (ThreadContext *tc) |
Protected Attributes | |
ExtMachInst | machInst |
uint32_t | issRaw |
bool | bStep |
bool | from64 |
bool | to64 |
ExceptionLevel | fromEL |
ExceptionLevel | toEL |
OperatingMode | fromMode |
OperatingMode | toMode |
bool | faultUpdated |
bool | hypRouted |
bool | span |
Generic fault source enums used to index into {short/long/aarch64}DescFaultSources[] to get the actual encodings based on the current register width state and the translation table format in use.
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inline |
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pure virtual |
Implemented in gem5::ArmISA::FastInterrupt, gem5::ArmISA::Interrupt, gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< PrefetchAbort >, gem5::ArmISA::AbortFault< VirtualDataAbort >, gem5::ArmISA::AbortFault< DataAbort >, gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< PrefetchAbort >, gem5::ArmISA::ArmFaultVals< VirtualDataAbort >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< DataAbort >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.
Referenced by invoke32().
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inlinevirtual |
Reimplemented in gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< PrefetchAbort >, gem5::ArmISA::AbortFault< VirtualDataAbort >, gem5::ArmISA::AbortFault< DataAbort >, gem5::ArmISA::Watchpoint, and gem5::ArmISA::DataAbort.
Definition at line 239 of file faults.hh.
Referenced by gem5::ArmISA::Watchpoint::annotate(), gem5::ArmISA::TableWalker::Stage2Walk::finish(), gem5::ArmISA::MMU::getResultTe(), and gem5::ArmISA::TableWalker::readDataUntimed().
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pure virtual |
Implemented in gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< PrefetchAbort >, gem5::ArmISA::ArmFaultVals< VirtualDataAbort >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< DataAbort >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.
Referenced by invoke64().
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pure virtual |
Implemented in gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< PrefetchAbort >, gem5::ArmISA::ArmFaultVals< VirtualDataAbort >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< DataAbort >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.
Referenced by invoke32().
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pure virtual |
Implemented in gem5::ArmISA::SoftwareStepFault, gem5::ArmISA::Watchpoint, gem5::ArmISA::HardwareBreakpoint, gem5::ArmISA::SoftwareBreakpoint, gem5::ArmISA::DataAbort, gem5::ArmISA::PrefetchAbort, gem5::ArmISA::HypervisorTrap, gem5::ArmISA::HypervisorCall, gem5::ArmISA::SecureMonitorTrap, gem5::ArmISA::SupervisorTrap, gem5::ArmISA::SecureMonitorCall, gem5::ArmISA::SupervisorCall, gem5::ArmISA::UndefinedInstruction, gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< PrefetchAbort >, gem5::ArmISA::ArmFaultVals< VirtualDataAbort >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< DataAbort >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.
Referenced by invoke32(), and setSyndrome().
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pure virtual |
Implemented in gem5::ArmISA::FastInterrupt, gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< PrefetchAbort >, gem5::ArmISA::ArmFaultVals< VirtualDataAbort >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< DataAbort >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.
Referenced by invoke32().
MiscRegIndex gem5::ArmISA::ArmFault::getFaultAddrReg64 | ( | ) | const |
Definition at line 382 of file faults.cc.
References gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmISA::MISCREG_FAR_EL1, gem5::ArmISA::MISCREG_FAR_EL2, gem5::ArmISA::MISCREG_FAR_EL3, panic, and toEL.
Referenced by gem5::ArmISA::PCAlignmentFault::invoke(), and gem5::ArmISA::Watchpoint::invoke().
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inlinevirtual |
Reimplemented in gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< PrefetchAbort >, gem5::ArmISA::AbortFault< VirtualDataAbort >, and gem5::ArmISA::AbortFault< DataAbort >.
Definition at line 258 of file faults.hh.
Referenced by gem5::ArmISA::getFaultVAddr().
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inlinevirtual |
Reimplemented in gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< PrefetchAbort >, gem5::ArmISA::AbortFault< VirtualDataAbort >, and gem5::ArmISA::AbortFault< DataAbort >.
Definition at line 256 of file faults.hh.
Referenced by gem5::ArmISA::ISA::addressTranslation(), and gem5::ArmISA::ISA::addressTranslation64().
MiscRegIndex gem5::ArmISA::ArmFault::getSyndromeReg64 | ( | ) | const |
Definition at line 366 of file faults.cc.
References gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmISA::MISCREG_ESR_EL1, gem5::ArmISA::MISCREG_ESR_EL2, gem5::ArmISA::MISCREG_ESR_EL3, panic, and toEL.
Referenced by invoke64().
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Reimplemented in gem5::ArmISA::Reset.
Definition at line 311 of file faults.cc.
References gem5::X86ISA::base, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmSystem::haveEL(), gem5::ArmISA::HighVecs, gem5::ArmISA::MISCREG_CPSR, gem5::ArmISA::MISCREG_HVBAR, gem5::ArmISA::MISCREG_MVBAR, gem5::ArmISA::MISCREG_SCTLR, gem5::ArmISA::MISCREG_VBAR, gem5::ArmISA::MODE_HYP, gem5::ArmISA::MODE_MON, offset(), gem5::ThreadContext::readMiscReg(), and gem5::ThreadContext::readMiscRegNoEffect().
Referenced by invoke32().
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protected |
Definition at line 343 of file faults.cc.
References gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmSystem::haveEL(), gem5::ArmISA::MISCREG_VBAR_EL1, gem5::ArmISA::MISCREG_VBAR_EL2, gem5::ArmISA::MISCREG_VBAR_EL3, offset64(), panic, gem5::ThreadContext::readMiscReg(), and toEL.
Referenced by invoke64().
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pure virtual |
Implemented in gem5::ArmISA::IllegalInstSetStateFault, gem5::ArmISA::SoftwareStepFault, gem5::ArmISA::Watchpoint, gem5::ArmISA::HardwareBreakpoint, gem5::ArmISA::SystemError, gem5::ArmISA::SPAlignmentFault, gem5::ArmISA::PCAlignmentFault, gem5::ArmISA::DataAbort, gem5::ArmISA::PrefetchAbort, gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< PrefetchAbort >, gem5::ArmISA::ArmFaultVals< VirtualDataAbort >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< DataAbort >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.
Referenced by setSyndrome().
ArmStaticInst * gem5::ArmISA::ArmFault::instrAnnotate | ( | const StaticInstPtr & | inst | ) |
Definition at line 730 of file faults.cc.
References gem5::ArmISA::ArmStaticInst::annotateFault(), and gem5::RefCountingPtr< T >::get().
Referenced by invoke32(), and invoke64().
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overridevirtual |
Reimplemented from gem5::FaultBase.
Reimplemented in gem5::ArmISA::ArmSev, gem5::ArmISA::Watchpoint, gem5::ArmISA::HardwareBreakpoint, gem5::ArmISA::SystemError, gem5::ArmISA::PCAlignmentFault, gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< PrefetchAbort >, gem5::ArmISA::AbortFault< VirtualDataAbort >, gem5::ArmISA::AbortFault< DataAbort >, gem5::ArmISA::SecureMonitorCall, gem5::ArmISA::SupervisorCall, gem5::ArmISA::UndefinedInstruction, gem5::ArmISA::Reset, and gem5::ArmISA::VirtualDataAbort.
Definition at line 477 of file faults.cc.
References from64, invoke32(), invoke64(), gem5::ArmISA::syncVecElemsToRegs(), gem5::ArmISA::syncVecRegsToElems(), to64, and update().
Referenced by gem5::ArmISA::Reset::invoke(), gem5::ArmISA::UndefinedInstruction::invoke(), gem5::ArmISA::SupervisorCall::invoke(), gem5::ArmISA::SecureMonitorCall::invoke(), gem5::ArmISA::AbortFault< DataAbort >::invoke(), gem5::ArmISA::PCAlignmentFault::invoke(), gem5::ArmISA::SystemError::invoke(), gem5::ArmISA::HardwareBreakpoint::invoke(), and gem5::ArmISA::Watchpoint::invoke().
void gem5::ArmISA::ArmFault::invoke32 | ( | ThreadContext * | tc, |
const StaticInstPtr & | inst = nullStaticInstPtr |
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Definition at line 504 of file faults.cc.
References abortDisable(), armPcOffset(), gem5::PCStateBase::as(), gem5::ArmISA::cc_reg::C, gem5::csprintf(), DPRINTF, ec(), gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmISA::ArmStaticInst::encoding(), fiqDisable(), gem5::FullSystem, gem5::ArmISA::cc_reg::Ge, gem5::ThreadContext::getReg(), getVector(), gem5::ArmSystem::haveEL(), instrAnnotate(), gem5::FaultBase::invoke(), gem5::ArmISA::itstate, gem5::ArmISA::int_reg::Lr, gem5::ArmISA::MISCREG_CPSR, gem5::ArmISA::MISCREG_ELR_HYP, gem5::ArmISA::MISCREG_HSCTLR, gem5::ArmISA::MISCREG_HSR, gem5::ArmISA::MISCREG_LOCKFLAG, gem5::ArmISA::MISCREG_SCR_EL3, gem5::ArmISA::MISCREG_SCTLR, gem5::ArmISA::MISCREG_SEV_MAILBOX, gem5::ArmISA::MISCREG_SPSR_ABT, gem5::ArmISA::MISCREG_SPSR_FIQ, gem5::ArmISA::MISCREG_SPSR_HYP, gem5::ArmISA::MISCREG_SPSR_IRQ, gem5::ArmISA::MISCREG_SPSR_MON, gem5::ArmISA::MISCREG_SPSR_SVC, gem5::ArmISA::MISCREG_SPSR_UND, gem5::ArmISA::MODE_ABORT, gem5::ArmISA::MODE_FIQ, gem5::ArmISA::MODE_HYP, gem5::ArmISA::MODE_IRQ, gem5::ArmISA::MODE_MON, gem5::ArmISA::MODE_SVC, gem5::ArmISA::MODE_UNDEFINED, gem5::FaultBase::name(), gem5::ArmISA::cc_reg::Nz, panic, gem5::MipsISA::pc, gem5::ThreadContext::pcState(), gem5::ThreadContext::readMiscReg(), gem5::ThreadContext::readMiscRegNoEffect(), gem5::ThreadContext::setMiscReg(), gem5::ThreadContext::setMiscRegNoEffect(), gem5::ThreadContext::setReg(), setSyndrome(), span, thumbPcOffset(), toMode, gem5::ArmISA::UNKNOWN, and gem5::ArmISA::cc_reg::V.
Referenced by invoke().
void gem5::ArmISA::ArmFault::invoke64 | ( | ThreadContext * | tc, |
const StaticInstPtr & | inst = nullStaticInstPtr |
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) |
Definition at line 634 of file faults.cc.
References armPcElrOffset(), gem5::PCStateBase::as(), gem5::ArmISA::cc_reg::C, gem5::csprintf(), DPRINTF, gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmISA::ArmStaticInst::encoding(), from64, gem5::ArmISA::cc_reg::Ge, gem5::ThreadContext::getReg(), getSyndromeReg64(), getVector64(), gem5::ArmSystem::haveEL(), gem5::PCStateBase::instAddr(), instrAnnotate(), isResetSPSR(), gem5::ArmISA::itstate, gem5::ArmISA::MISCREG_CPSR, gem5::ArmISA::MISCREG_ELR_EL1, gem5::ArmISA::MISCREG_ELR_EL2, gem5::ArmISA::MISCREG_ELR_EL3, gem5::ArmISA::MISCREG_SPSR_EL1, gem5::ArmISA::MISCREG_SPSR_EL2, gem5::ArmISA::MISCREG_SPSR_EL3, gem5::ArmISA::mode, gem5::ArmISA::MODE_FIQ, gem5::ArmISA::MODE_IRQ, gem5::FaultBase::name(), nextMode(), gem5::ArmISA::cc_reg::Nz, panic, gem5::MipsISA::pc, gem5::ThreadContext::pcState(), gem5::ArmISA::purifyTaggedAddr(), gem5::ThreadContext::readMiscReg(), gem5::ThreadContext::setMiscReg(), setSyndrome(), span, thumbPcElrOffset(), toEL, and gem5::ArmISA::cc_reg::V.
Referenced by invoke().
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pure virtual |
Implemented in gem5::ArmISA::SoftwareStepFault, gem5::ArmISA::Watchpoint, gem5::ArmISA::DataAbort, gem5::ArmISA::PrefetchAbort, gem5::ArmISA::SupervisorTrap, gem5::ArmISA::SecureMonitorCall, gem5::ArmISA::SupervisorCall, gem5::ArmISA::UndefinedInstruction, and gem5::ArmISA::ArmFaultVals< T >.
Referenced by gem5::ArmISA::ISA::addressTranslation(), gem5::ArmISA::ISA::addressTranslation64(), and setSyndrome().
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inlinevirtual |
Reimplemented in gem5::ArmISA::AbortFault< T >.
Definition at line 255 of file faults.hh.
Referenced by gem5::ArmISA::ISA::addressTranslation(), and gem5::ArmISA::ISA::addressTranslation64().
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pure virtual |
Implemented in gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< PrefetchAbort >, gem5::ArmISA::ArmFaultVals< VirtualDataAbort >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< DataAbort >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.
Referenced by invoke64(), and update().
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pure virtual |
Implemented in gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< PrefetchAbort >, gem5::ArmISA::ArmFaultVals< VirtualDataAbort >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< DataAbort >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.
Referenced by getVector().
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Implemented in gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< PrefetchAbort >, gem5::ArmISA::ArmFaultVals< VirtualDataAbort >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< DataAbort >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.
Referenced by getVector64().
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Reimplemented in gem5::ArmISA::IllegalInstSetStateFault, gem5::ArmISA::SoftwareStepFault, gem5::ArmISA::Watchpoint, gem5::ArmISA::HardwareBreakpoint, gem5::ArmISA::SoftwareBreakpoint, gem5::ArmISA::SystemError, gem5::ArmISA::SPAlignmentFault, gem5::ArmISA::PCAlignmentFault, gem5::ArmISA::FastInterrupt, gem5::ArmISA::Interrupt, gem5::ArmISA::DataAbort, gem5::ArmISA::PrefetchAbort, gem5::ArmISA::HypervisorCall, gem5::ArmISA::SupervisorTrap, gem5::ArmISA::SupervisorCall, and gem5::ArmISA::UndefinedInstruction.
Definition at line 244 of file faults.hh.
Referenced by update().
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Implemented in gem5::ArmISA::SystemError, gem5::ArmISA::FastInterrupt, gem5::ArmISA::Interrupt, gem5::ArmISA::DataAbort, gem5::ArmISA::PrefetchAbort, gem5::ArmISA::HypervisorCall, gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< PrefetchAbort >, gem5::ArmISA::ArmFaultVals< VirtualDataAbort >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< DataAbort >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.
Referenced by update().
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Reimplemented in gem5::ArmISA::AbortFault< T >, gem5::ArmISA::AbortFault< PrefetchAbort >, gem5::ArmISA::AbortFault< VirtualDataAbort >, and gem5::ArmISA::AbortFault< DataAbort >.
Definition at line 398 of file faults.cc.
References gem5::bits(), gem5::ArmISA::COND_AL, gem5::ArmISA::COND_UC, ec(), from64, gem5::ArmSystem::highestELIs64(), il(), iss(), machInst, and gem5::ThreadContext::setMiscReg().
Referenced by invoke32(), invoke64(), and gem5::ArmISA::AbortFault< DataAbort >::setSyndrome().
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Implemented in gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< PrefetchAbort >, gem5::ArmISA::ArmFaultVals< VirtualDataAbort >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< DataAbort >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.
Referenced by invoke64().
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Implemented in gem5::ArmISA::ArmFaultVals< T >, gem5::ArmISA::ArmFaultVals< PrefetchAbort >, gem5::ArmISA::ArmFaultVals< VirtualDataAbort >, gem5::ArmISA::ArmFaultVals< Interrupt >, gem5::ArmISA::ArmFaultVals< SoftwareBreakpoint >, gem5::ArmISA::ArmFaultVals< IllegalInstSetStateFault >, gem5::ArmISA::ArmFaultVals< SupervisorCall >, gem5::ArmISA::ArmFaultVals< HypervisorCall >, gem5::ArmISA::ArmFaultVals< Reset >, gem5::ArmISA::ArmFaultVals< HardwareBreakpoint >, gem5::ArmISA::ArmFaultVals< UndefinedInstruction >, gem5::ArmISA::ArmFaultVals< HypervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualFastInterrupt >, gem5::ArmISA::ArmFaultVals< PCAlignmentFault >, gem5::ArmISA::ArmFaultVals< DataAbort >, gem5::ArmISA::ArmFaultVals< SupervisorTrap >, gem5::ArmISA::ArmFaultVals< VirtualInterrupt >, gem5::ArmISA::ArmFaultVals< SecureMonitorTrap >, gem5::ArmISA::ArmFaultVals< SPAlignmentFault >, gem5::ArmISA::ArmFaultVals< SecureMonitorCall >, gem5::ArmISA::ArmFaultVals< SystemError >, gem5::ArmISA::ArmFaultVals< Watchpoint >, gem5::ArmISA::ArmFaultVals< ArmSev >, gem5::ArmISA::ArmFaultVals< SoftwareStepFault >, and gem5::ArmISA::ArmFaultVals< FastInterrupt >.
Referenced by invoke32().
void gem5::ArmISA::ArmFault::update | ( | ThreadContext * | tc | ) |
Definition at line 428 of file faults.cc.
References gem5::ArmISA::EL1, gem5::ArmISA::EL2, gem5::ArmISA::EL3, gem5::ArmISA::ELIs64(), faultUpdated, from64, fromEL, fromMode, gem5::ArmSystem::haveEL(), gem5::ArmISA::HaveExt(), hypRouted, gem5::ArmISA::MISCREG_CPSR, gem5::ArmISA::MISCREG_HCR_EL2, gem5::ArmISA::MISCREG_SCTLR_EL1, gem5::ArmISA::MISCREG_SCTLR_EL2, gem5::ArmISA::MODE_HYP, gem5::ArmISA::MODE_MON, nextMode(), gem5::ArmISA::opModeToEL(), gem5::ThreadContext::readMiscReg(), gem5::ThreadContext::readMiscRegNoEffect(), routeToHyp(), routeToMonitor(), span, to64, toEL, and toMode.
Referenced by gem5::ArmISA::ISA::addressTranslation(), gem5::ArmISA::ISA::addressTranslation64(), and invoke().
bool gem5::ArmISA::ArmFault::vectorCatch | ( | ThreadContext * | tc, |
const StaticInstPtr & | inst | ||
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Encodings of the fault sources in AArch64 state.
Definition at line 130 of file faults.hh.
Referenced by gem5::ArmISA::AbortFault< DataAbort >::getFaultStatusCode().
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Definition at line 71 of file faults.hh.
Referenced by gem5::ArmISA::HypervisorCall::HypervisorCall(), isResetSPSR(), gem5::ArmISA::SecureMonitorCall::SecureMonitorCall(), gem5::ArmISA::SoftwareStepFault::SoftwareStepFault(), and gem5::ArmISA::SupervisorCall::SupervisorCall().
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Definition at line 72 of file faults.hh.
Referenced by gem5::ArmISA::SupervisorCall::ec(), gem5::ArmISA::SecureMonitorCall::ec(), gem5::ArmISA::SecureMonitorTrap::ec(), gem5::ArmISA::HypervisorCall::ec(), gem5::ArmISA::SoftwareBreakpoint::ec(), invoke(), gem5::ArmISA::PCAlignmentFault::invoke(), invoke64(), gem5::ArmISA::SecureMonitorCall::iss(), gem5::ArmISA::HypervisorCall::routeToHyp(), gem5::ArmISA::SPAlignmentFault::routeToHyp(), gem5::ArmISA::SystemError::routeToHyp(), gem5::ArmISA::HypervisorCall::routeToMonitor(), gem5::ArmISA::SystemError::routeToMonitor(), setSyndrome(), and update().
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Definition at line 74 of file faults.hh.
Referenced by gem5::ArmISA::PrefetchAbort::ec(), gem5::ArmISA::DataAbort::ec(), gem5::ArmISA::HardwareBreakpoint::ec(), gem5::ArmISA::Watchpoint::ec(), gem5::ArmISA::SoftwareStepFault::ec(), gem5::ArmISA::UndefinedInstruction::routeToHyp(), gem5::ArmISA::SupervisorCall::routeToHyp(), gem5::ArmISA::HypervisorCall::routeToHyp(), gem5::ArmISA::PrefetchAbort::routeToHyp(), gem5::ArmISA::DataAbort::routeToHyp(), gem5::ArmISA::Interrupt::routeToHyp(), gem5::ArmISA::FastInterrupt::routeToHyp(), gem5::ArmISA::PCAlignmentFault::routeToHyp(), gem5::ArmISA::SystemError::routeToHyp(), gem5::ArmISA::SoftwareBreakpoint::routeToHyp(), gem5::ArmISA::HardwareBreakpoint::routeToHyp(), gem5::ArmISA::Watchpoint::routeToHyp(), gem5::ArmISA::SoftwareStepFault::routeToHyp(), gem5::ArmISA::IllegalInstSetStateFault::routeToHyp(), gem5::ArmISA::HypervisorCall::routeToMonitor(), gem5::ArmISA::SystemError::routeToMonitor(), and update().
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Definition at line 84 of file faults.hh.
Referenced by gem5::ArmISA::UndefinedInstruction::ec(), gem5::ArmISA::SupervisorTrap::ec(), gem5::ArmISA::UndefinedInstruction::iss(), gem5::ArmISA::SupervisorTrap::iss(), and update().
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Definition at line 68 of file faults.hh.
Referenced by gem5::ArmISA::ArmFaultVals< FastInterrupt >::iss(), gem5::ArmISA::UndefinedInstruction::iss(), gem5::ArmISA::SupervisorCall::iss(), and gem5::ArmISA::SupervisorTrap::iss().
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Encodings of the fault sources when the long-desc.
translation table format is in use (ARM ARM Issue C B3.13.3)
Definition at line 128 of file faults.hh.
Referenced by gem5::ArmISA::AbortFault< DataAbort >::getFaultStatusCode().
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Definition at line 67 of file faults.hh.
Referenced by gem5::ArmISA::ArmFaultVals< FastInterrupt >::il(), gem5::ArmISA::SupervisorCall::invoke(), gem5::ArmISA::UndefinedInstruction::iss(), gem5::ArmISA::SecureMonitorCall::iss(), and setSyndrome().
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Encodings of the fault sources when the short-desc.
translation table format is in use (ARM ARM Issue C B3.13.3)
Definition at line 125 of file faults.hh.
Referenced by gem5::ArmISA::AbortFault< DataAbort >::getFaultStatusCode().
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Definition at line 85 of file faults.hh.
Referenced by invoke32(), invoke64(), and update().
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Definition at line 73 of file faults.hh.
Referenced by gem5::ArmISA::PrefetchAbort::ec(), gem5::ArmISA::DataAbort::ec(), invoke(), gem5::ArmISA::DataAbort::iss(), and update().
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Definition at line 75 of file faults.hh.
Referenced by gem5::ArmISA::PrefetchAbort::ec(), gem5::ArmISA::DataAbort::ec(), gem5::ArmISA::HardwareBreakpoint::ec(), gem5::ArmISA::Watchpoint::ec(), gem5::ArmISA::SoftwareStepFault::ec(), getFaultAddrReg64(), getSyndromeReg64(), getVector64(), gem5::ArmISA::HardwareBreakpoint::invoke(), invoke64(), gem5::ArmISA::DataAbort::iss(), and update().
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Definition at line 77 of file faults.hh.
Referenced by getToMode(), invoke32(), and update().