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nop_static_inst.cc
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28 
29 #include "cpu/nop_static_inst.hh"
30 
31 #include "arch/generic/pcstate.hh"
32 #include "cpu/static_inst.hh"
33 
34 namespace gem5
35 {
36 
37 namespace
38 {
39 
40 class NopStaticInst : public StaticInst
41 {
42  public:
43  NopStaticInst() : StaticInst("gem5 nop", No_OpClass) {}
44 
45  Fault
46  execute(ExecContext *xc, trace::InstRecord *traceData) const override
47  {
48  return NoFault;
49  }
50 
51  void
52  advancePC(PCStateBase &pc) const override
53  {
54  pc.advance();
55  }
56 
57  std::string
58  generateDisassembly(Addr pc,
59  const loader::SymbolTable *symtab) const override
60  {
61  return mnemonic;
62  }
63 };
64 
65 }
66 
67 StaticInstPtr nopStaticInstPtr = new NopStaticInst;
68 
69 } // namespace gem5
gem5::NoFault
constexpr decltype(nullptr) NoFault
Definition: types.hh:253
gem5::RefCountingPtr< StaticInst >
nop_static_inst.hh
gem5::Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:248
static_inst.hh
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
pcstate.hh
gem5::nopStaticInstPtr
StaticInstPtr nopStaticInstPtr
Pointer to a statically allocated generic "nop" instruction object.
Definition: nop_static_inst.cc:67
gem5::MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:243
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
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