branch.hh

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/*
 * Copyright (c) 2006-2007 The Regents of The University of Michigan
 * All rights reserved.
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 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
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 * neither the name of the copyright holders nor the names of its
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 * this software without specific prior written permission.
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#ifndef __ARCH_SPARC_INSTS_BRANCH_HH__
#define __ARCH_SPARC_INSTS_BRANCH_HH__
 
#include "arch/sparc/insts/static_inst.hh"
 
namespace gem5
{
 
//
// Branch instructions
//
 
namespace SparcISA
{
 
class Branch : public SparcStaticInst
{
  protected:
    using SparcStaticInst::SparcStaticInst;
 
    std::string generateDisassembly(
            Addr pc, const loader::SymbolTable *symtab) const override;
};
 
class BranchDisp : public Branch
{
  protected:
    BranchDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
               int32_t _disp) :
        Branch(mnem, _machInst, __opClass), disp(_disp)
    {}
 
    std::string generateDisassembly(
            Addr pc, const loader::SymbolTable *symtab) const override;
 
    int32_t disp;
};
 
template<int bits>
class BranchNBits : public BranchDisp
{
  protected:
    // Constructor
    BranchNBits(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
        BranchDisp(mnem, _machInst, __opClass, szext<bits>(_machInst) << 2)
    {}
};
 
class BranchSplit : public BranchDisp
{
  protected:
    // Constructor
    BranchSplit(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
        BranchDisp(mnem, _machInst, __opClass,
                   sext<18>((bits(_machInst, 21, 20) << 16) |
                            (bits(_machInst, 13, 0) << 2)))
    {}
};
 
class BranchImm13 : public Branch
{
  protected:
    // Constructor
    BranchImm13(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
        Branch(mnem, _machInst, __opClass), imm(szext<13>(_machInst))
    {}
 
    std::string generateDisassembly(
            Addr pc, const loader::SymbolTable *symtab) const override;
 
    int32_t imm;
};
 
} // namespace SparcISA
} // namespace gem5
 
#endif // __ARCH_SPARC_INSTS_BRANCH_HH__