gem5::Gcn3ISA::InFmt_EXP_1 Struct Reference

#include <gpu_decoder.hh>

Public Attributes
unsigned int	VSRC0: 8
unsigned int	VSRC1: 8
unsigned int	VSRC2: 8
unsigned int	VSRC3: 8

Detailed Description

Definition at line 1384 of file gpu_decoder.hh.

Member Data Documentation

VSRC0

unsigned int gem5::Gcn3ISA::InFmt_EXP_1::VSRC0

Definition at line 1386 of file gpu_decoder.hh.

Referenced by gem5::Gcn3ISA::Inst_EXP::initOperandInfo().

VSRC1

unsigned int gem5::Gcn3ISA::InFmt_EXP_1::VSRC1

Definition at line 1387 of file gpu_decoder.hh.

Referenced by gem5::Gcn3ISA::Inst_EXP::initOperandInfo().

VSRC2

unsigned int gem5::Gcn3ISA::InFmt_EXP_1::VSRC2

Definition at line 1388 of file gpu_decoder.hh.

Referenced by gem5::Gcn3ISA::Inst_EXP::initOperandInfo().

VSRC3

unsigned int gem5::Gcn3ISA::InFmt_EXP_1::VSRC3

Definition at line 1389 of file gpu_decoder.hh.

Referenced by gem5::Gcn3ISA::Inst_EXP::initOperandInfo().

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The documentation for this struct was generated from the following file:

• arch/amdgpu/gcn3/gpu_decoder.hh