gem5::Gcn3ISA::InFmt_MIMG_1 Struct Reference

#include <gpu_decoder.hh>

Public Attributes
unsigned int	VADDR: 8
unsigned int	VDATA: 8
unsigned int	SRSRC: 5
unsigned int	SSAMP: 5
unsigned int	pad_26_30: 5
unsigned int	D16: 1

Detailed Description

Definition at line 1431 of file gpu_decoder.hh.

Member Data Documentation

D16

unsigned int gem5::Gcn3ISA::InFmt_MIMG_1::D16

Definition at line 1438 of file gpu_decoder.hh.

pad_26_30

unsigned int gem5::Gcn3ISA::InFmt_MIMG_1::pad_26_30

Definition at line 1437 of file gpu_decoder.hh.

SRSRC

unsigned int gem5::Gcn3ISA::InFmt_MIMG_1::SRSRC

Definition at line 1435 of file gpu_decoder.hh.

Referenced by gem5::Gcn3ISA::Inst_MIMG::initOperandInfo().

SSAMP

unsigned int gem5::Gcn3ISA::InFmt_MIMG_1::SSAMP

Definition at line 1436 of file gpu_decoder.hh.

Referenced by gem5::Gcn3ISA::Inst_MIMG::initOperandInfo().

VADDR

unsigned int gem5::Gcn3ISA::InFmt_MIMG_1::VADDR

Definition at line 1433 of file gpu_decoder.hh.

Referenced by gem5::Gcn3ISA::Inst_MIMG::initOperandInfo().

VDATA

unsigned int gem5::Gcn3ISA::InFmt_MIMG_1::VDATA

Definition at line 1434 of file gpu_decoder.hh.

Referenced by gem5::Gcn3ISA::Inst_MIMG::initOperandInfo().

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The documentation for this struct was generated from the following file:

• arch/amdgpu/gcn3/gpu_decoder.hh