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tme64classic.cc
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37 
38 #include "arch/arm/faults.hh"
39 #include "arch/arm/insts/tme64.hh"
40 
41 namespace gem5
42 {
43 
44 using namespace ArmISA;
45 
46 namespace ArmISAInst {
47 
48 Fault
49 Tstart64::initiateAcc(ExecContext *xc,
50  trace::InstRecord *traceData) const
51 {
52  return std::make_shared<UndefinedInstruction>(machInst,
53  false,
54  mnemonic);
55 }
56 
57 Fault
58 Tstart64::completeAcc(PacketPtr pkt, ExecContext *xc,
59  trace::InstRecord *traceData) const
60 {
61  return std::make_shared<UndefinedInstruction>(machInst,
62  false,
63  mnemonic);
64 }
65 
66 Fault
67 Ttest64::execute(
68  ExecContext *xc, trace::InstRecord *traceData) const
69 {
70  return std::make_shared<UndefinedInstruction>(machInst,
71  false,
72  mnemonic);
73 }
74 
75 Fault
76 Tcancel64::initiateAcc(ExecContext *xc,
77  trace::InstRecord *traceData) const
78 {
79  return std::make_shared<UndefinedInstruction>(machInst,
80  false,
81  mnemonic);
82 }
83 
84 Fault
85 Tcancel64::completeAcc(PacketPtr pkt, ExecContext *xc,
86  trace::InstRecord *traceData) const
87 {
88  return std::make_shared<UndefinedInstruction>(machInst,
89  false,
90  mnemonic);
91 }
92 
93 Fault
94 MicroTcommit64::initiateAcc(ExecContext *xc,
95  trace::InstRecord *traceData) const
96 {
97  return std::make_shared<UndefinedInstruction>(machInst,
98  false,
99  mnemonic);
100 }
101 
102 Fault
103 MicroTcommit64::completeAcc(PacketPtr pkt, ExecContext *xc,
104  trace::InstRecord *traceData) const
105 {
106  return std::make_shared<UndefinedInstruction>(machInst,
107  false,
108  mnemonic);
109 
110 }
111 
112 } // namespace ArmISAInst
113 } // namespace gem5
gem5::trace::InstRecord
Definition: insttracer.hh:60
tme64.hh
gem5::ArmISAInst::Tstart64::completeAcc
Fault completeAcc(PacketPtr, ExecContext *, trace::InstRecord *) const
Definition: tme64classic.cc:58
gem5::Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:248
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:294
gem5::ArmISAInst::MicroTcommit64::initiateAcc
Fault initiateAcc(ExecContext *, trace::InstRecord *) const
Definition: tme64classic.cc:94
faults.hh
gem5::ArmISAInst::Tcancel64::initiateAcc
Fault initiateAcc(ExecContext *, trace::InstRecord *) const
Definition: tme64classic.cc:76
gem5::ArmISAInst::MicroTcommit64::completeAcc
Fault completeAcc(PacketPtr, ExecContext *, trace::InstRecord *) const
Definition: tme64classic.cc:103
gem5::ArmISAInst::Tstart64::initiateAcc
Fault initiateAcc(ExecContext *, trace::InstRecord *) const
Definition: tme64classic.cc:49
gem5::ArmISAInst::Ttest64::execute
Fault execute(ExecContext *, trace::InstRecord *) const
Definition: tme64classic.cc:67
gem5::ArmISAInst::Tcancel64::completeAcc
Fault completeAcc(PacketPtr, ExecContext *, trace::InstRecord *) const
Definition: tme64classic.cc:85
gem5::ExecContext
The ExecContext is an abstract base class the provides the interface used by the ISA to manipulate th...
Definition: exec_context.hh:71
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
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