gem5::SMMURegs Union Reference

#include <smmu_v3_defs.hh>

Public Attributes
uint8_t	data [SMMU_REG_SIZE]
struct {
uint32_t   idr0
uint32_t   idr1
uint32_t   idr2
uint32_t   idr3
uint32_t   idr4
uint32_t   idr5
uint32_t   iidr
uint32_t   aidr
uint32_t   cr0
uint32_t   cr0ack
uint32_t   cr1
uint32_t   cr2
uint32_t   _pad1
uint32_t   _pad2
uint32_t   _pad3
uint32_t   _pad4
uint32_t   statusr
uint32_t   gbpa
uint32_t   agbpa
uint32_t   _pad5
uint32_t   irq_ctrl
uint32_t   irq_ctrlack
uint32_t   _pad6
uint32_t   _pad7
uint32_t   gerror
uint32_t   gerrorn
uint64_t   gerror_irq_cfg0
uint32_t   gerror_irq_cfg1
uint32_t   gerror_irq_cfg2
uint32_t   _pad_1
uint32_t   _pad_2
uint64_t   strtab_base
uint32_t   strtab_base_cfg
uint64_t   cmdq_base
uint32_t   cmdq_prod
uint32_t   cmdq_cons
uint64_t   eventq_base
uint32_t   _pad8
uint32_t   _pad9
uint64_t   eventq_irq_cfg0
uint32_t   eventq_irq_cfg1
uint32_t   eventq_irq_cfg2
uint64_t   priq_base
uint32_t   _pad10
uint32_t   _pad11
uint64_t   priq_irq_cfg0
uint32_t   priq_irq_cfg1
uint32_t   priq_irq_cfg2
uint32_t   _pad12 [8]
uint32_t   gatos_ctrl
uint32_t   _pad13
uint64_t   gatos_sid
uint64_t   gatos_addr
uint64_t   gatos_par
uint32_t   _pad14 [24]
uint32_t   vatos_sel
uint32_t   _pad15 [8095]
uint8_t   _secure_regs [SMMU_SECURE_SZ]
uint32_t   _pad16 [8095]
uint32_t   _pad17 [42]
uint32_t   eventq_prod
uint32_t   eventq_cons
uint32_t   _pad18 [6]
uint32_t   priq_prod
uint32_t   priq_cons
};

Detailed Description

Definition at line 109 of file smmu_v3_defs.hh.

Member Data Documentation

@298

struct { ... }

_pad1

uint32_t gem5::SMMURegs::_pad1

Definition at line 127 of file smmu_v3_defs.hh.

_pad10

uint32_t gem5::SMMURegs::_pad10

Definition at line 161 of file smmu_v3_defs.hh.

_pad11

uint32_t gem5::SMMURegs::_pad11

Definition at line 162 of file smmu_v3_defs.hh.

_pad12

uint32_t gem5::SMMURegs::_pad12[8]

Definition at line 168 of file smmu_v3_defs.hh.

_pad13

uint32_t gem5::SMMURegs::_pad13

Definition at line 170 of file smmu_v3_defs.hh.

_pad14

uint32_t gem5::SMMURegs::_pad14[24]

Definition at line 174 of file smmu_v3_defs.hh.

_pad15

uint32_t gem5::SMMURegs::_pad15[8095]

Definition at line 177 of file smmu_v3_defs.hh.

_pad16

uint32_t gem5::SMMURegs::_pad16[8095]

Definition at line 181 of file smmu_v3_defs.hh.

_pad17

uint32_t gem5::SMMURegs::_pad17[42]

Definition at line 184 of file smmu_v3_defs.hh.

_pad18

uint32_t gem5::SMMURegs::_pad18[6]

Definition at line 188 of file smmu_v3_defs.hh.

_pad2

uint32_t gem5::SMMURegs::_pad2

Definition at line 128 of file smmu_v3_defs.hh.

_pad3

uint32_t gem5::SMMURegs::_pad3

Definition at line 129 of file smmu_v3_defs.hh.

_pad4

uint32_t gem5::SMMURegs::_pad4

Definition at line 130 of file smmu_v3_defs.hh.

_pad5

uint32_t gem5::SMMURegs::_pad5

Definition at line 134 of file smmu_v3_defs.hh.

_pad6

uint32_t gem5::SMMURegs::_pad6

Definition at line 137 of file smmu_v3_defs.hh.

_pad7

uint32_t gem5::SMMURegs::_pad7

Definition at line 138 of file smmu_v3_defs.hh.

_pad8

uint32_t gem5::SMMURegs::_pad8

Definition at line 155 of file smmu_v3_defs.hh.

_pad9

uint32_t gem5::SMMURegs::_pad9

Definition at line 156 of file smmu_v3_defs.hh.

_pad_1

uint32_t gem5::SMMURegs::_pad_1

Definition at line 145 of file smmu_v3_defs.hh.

_pad_2

uint32_t gem5::SMMURegs::_pad_2

Definition at line 146 of file smmu_v3_defs.hh.

_secure_regs

uint8_t gem5::SMMURegs::_secure_regs[SMMU_SECURE_SZ]

Definition at line 179 of file smmu_v3_defs.hh.

agbpa

uint32_t gem5::SMMURegs::agbpa

Definition at line 133 of file smmu_v3_defs.hh.

aidr

uint32_t gem5::SMMURegs::aidr

Definition at line 122 of file smmu_v3_defs.hh.

cmdq_base

uint64_t gem5::SMMURegs::cmdq_base

Definition at line 151 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUCommandExecProcess::main().

cmdq_cons

uint32_t gem5::SMMURegs::cmdq_cons

Definition at line 153 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUCommandExecProcess::main(), and gem5::SMMUv3::writeControl().

cmdq_prod

uint32_t gem5::SMMURegs::cmdq_prod

Definition at line 152 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUCommandExecProcess::main(), and gem5::SMMUv3::writeControl().

cr0

uint32_t gem5::SMMURegs::cr0

Definition at line 123 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUTranslationProcess::main(), and gem5::SMMUv3::writeControl().

cr0ack

uint32_t gem5::SMMURegs::cr0ack

Definition at line 124 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUv3::writeControl().

cr1

uint32_t gem5::SMMURegs::cr1

Definition at line 125 of file smmu_v3_defs.hh.

cr2

uint32_t gem5::SMMURegs::cr2

Definition at line 126 of file smmu_v3_defs.hh.

data

uint8_t gem5::SMMURegs::data[SMMU_REG_SIZE]

Definition at line 111 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUv3::readControl(), gem5::SMMUv3::serialize(), gem5::SMMUv3::unserialize(), and gem5::SMMUv3::writeControl().

eventq_base

uint64_t gem5::SMMURegs::eventq_base

Definition at line 154 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUTranslationProcess::sendEvent().

eventq_cons

uint32_t gem5::SMMURegs::eventq_cons

Definition at line 186 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUTranslationProcess::sendEvent(), and gem5::SMMUv3::writeControl().

eventq_irq_cfg0

uint64_t gem5::SMMURegs::eventq_irq_cfg0

Definition at line 157 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUTranslationProcess::sendEvent().

eventq_irq_cfg1

uint32_t gem5::SMMURegs::eventq_irq_cfg1

Definition at line 158 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUTranslationProcess::sendEvent().

eventq_irq_cfg2

uint32_t gem5::SMMURegs::eventq_irq_cfg2

Definition at line 159 of file smmu_v3_defs.hh.

eventq_prod

uint32_t gem5::SMMURegs::eventq_prod

Definition at line 185 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUTranslationProcess::sendEvent(), and gem5::SMMUv3::writeControl().

gatos_addr

uint64_t gem5::SMMURegs::gatos_addr

Definition at line 172 of file smmu_v3_defs.hh.

gatos_ctrl

uint32_t gem5::SMMURegs::gatos_ctrl

Definition at line 169 of file smmu_v3_defs.hh.

gatos_par

uint64_t gem5::SMMURegs::gatos_par

Definition at line 173 of file smmu_v3_defs.hh.

gatos_sid

uint64_t gem5::SMMURegs::gatos_sid

Definition at line 171 of file smmu_v3_defs.hh.

gbpa

uint32_t gem5::SMMURegs::gbpa

Definition at line 132 of file smmu_v3_defs.hh.

gerror

uint32_t gem5::SMMURegs::gerror

Definition at line 140 of file smmu_v3_defs.hh.

gerror_irq_cfg0

uint64_t gem5::SMMURegs::gerror_irq_cfg0

Definition at line 142 of file smmu_v3_defs.hh.

gerror_irq_cfg1

uint32_t gem5::SMMURegs::gerror_irq_cfg1

Definition at line 143 of file smmu_v3_defs.hh.

gerror_irq_cfg2

uint32_t gem5::SMMURegs::gerror_irq_cfg2

Definition at line 144 of file smmu_v3_defs.hh.

gerrorn

uint32_t gem5::SMMURegs::gerrorn

Definition at line 141 of file smmu_v3_defs.hh.

idr0

uint32_t gem5::SMMURegs::idr0

Definition at line 115 of file smmu_v3_defs.hh.

idr1

uint32_t gem5::SMMURegs::idr1

Definition at line 116 of file smmu_v3_defs.hh.

idr2

uint32_t gem5::SMMURegs::idr2

Definition at line 117 of file smmu_v3_defs.hh.

idr3

uint32_t gem5::SMMURegs::idr3

Definition at line 118 of file smmu_v3_defs.hh.

idr4

uint32_t gem5::SMMURegs::idr4

Definition at line 119 of file smmu_v3_defs.hh.

idr5

uint32_t gem5::SMMURegs::idr5

Definition at line 120 of file smmu_v3_defs.hh.

iidr

uint32_t gem5::SMMURegs::iidr

Definition at line 121 of file smmu_v3_defs.hh.

irq_ctrl

uint32_t gem5::SMMURegs::irq_ctrl

Definition at line 135 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUv3::writeControl().

irq_ctrlack

uint32_t gem5::SMMURegs::irq_ctrlack

Definition at line 136 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUv3::writeControl().

priq_base

uint64_t gem5::SMMURegs::priq_base

Definition at line 160 of file smmu_v3_defs.hh.

priq_cons

uint32_t gem5::SMMURegs::priq_cons

Definition at line 190 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUv3::writeControl().

priq_irq_cfg0

uint64_t gem5::SMMURegs::priq_irq_cfg0

Definition at line 164 of file smmu_v3_defs.hh.

priq_irq_cfg1

uint32_t gem5::SMMURegs::priq_irq_cfg1

Definition at line 165 of file smmu_v3_defs.hh.

priq_irq_cfg2

uint32_t gem5::SMMURegs::priq_irq_cfg2

Definition at line 166 of file smmu_v3_defs.hh.

priq_prod

uint32_t gem5::SMMURegs::priq_prod

Definition at line 189 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUv3::writeControl().

statusr

uint32_t gem5::SMMURegs::statusr

Definition at line 131 of file smmu_v3_defs.hh.

strtab_base

uint64_t gem5::SMMURegs::strtab_base

Definition at line 148 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUTranslationProcess::doReadSTE().

strtab_base_cfg

uint32_t gem5::SMMURegs::strtab_base_cfg

Definition at line 149 of file smmu_v3_defs.hh.

Referenced by gem5::SMMUTranslationProcess::doReadSTE().

vatos_sel

uint32_t gem5::SMMURegs::vatos_sel

Definition at line 175 of file smmu_v3_defs.hh.

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The documentation for this union was generated from the following file:

• dev/arm/smmu_v3_defs.hh