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arch
arm
insts
vector_element_traits.hh
Go to the documentation of this file.
1
/*
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* Copyright (c) 2020 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_ARM_VECTOR_ELEMENT_TRAITS_HH__
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#define __ARCH_ARM_VECTOR_ELEMENT_TRAITS_HH__
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#include <type_traits>
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namespace
gem5
{
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namespace
ArmISA {
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namespace
vector_element_traits {
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// Make an integral type with the size of IntDestElemType but the
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// signed-ness of IntSrcElemType. The size of IntDestElemType must be
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// greater than or equal to the size of IntSrcElemType.
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template
<
typename
IntDestElemType,
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typename
IntSrcElemType>
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class
extend_element
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{
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public
:
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static_assert(std::is_integral<IntDestElemType>::value
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&& std::is_integral<IntSrcElemType>::value
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&&
sizeof
(IntDestElemType) >=
sizeof
(IntSrcElemType),
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"Extended Element Dest and Src types must both be "
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"integer types, and Dest must be at least as large "
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"as Src."
);
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using
type
=
typename
std::conditional<
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std::is_signed<IntSrcElemType>::value,
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typename
std::make_signed<IntDestElemType>::type
,
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typename
std::make_unsigned<IntDestElemType>::type
>
::type
;
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};
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}
// namespace vector_element_traits
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}
// namespace ArmISA
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}
// namespace gem5
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#endif // __ARCH_ARM_VECTOR_ELEMENT_TRAITS_HH__
gem5::X86ISA::type
type
Definition:
misc.hh:734
gem5::ArmISA::vector_element_traits::extend_element
Definition:
vector_element_traits.hh:53
gem5::ArmISA::vector_element_traits::extend_element::type
typename std::conditional< std::is_signed< IntSrcElemType >::value, typename std::make_signed< IntDestElemType >::type, typename std::make_unsigned< IntDestElemType >::type >::type type
Definition:
vector_element_traits.hh:65
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition:
gpu_translation_state.hh:37
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