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write_queue_entry.hh
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40 
46 #ifndef __MEM_CACHE_WRITE_QUEUE_ENTRY_HH__
47 #define __MEM_CACHE_WRITE_QUEUE_ENTRY_HH__
48 
49 #include <cassert>
50 #include <iosfwd>
51 #include <list>
52 #include <string>
53 
54 #include "base/printable.hh"
55 #include "base/types.hh"
56 #include "mem/cache/queue_entry.hh"
57 #include "mem/packet.hh"
58 
59 namespace gem5
60 {
61 
62 class BaseCache;
63 
67 class WriteQueueEntry : public QueueEntry, public Printable
68 {
69 
73  template<typename Entry>
74  friend class Queue;
75  friend class WriteQueue;
76 
77  public:
78  class TargetList : public std::list<Target>
79  {
80 
81  public:
82 
86  void print(std::ostream &os, int verbosity,
87  const std::string &prefix) const;
88  };
89 
93  typedef List::iterator Iterator;
94 
95  bool sendPacket(BaseCache &cache) override;
96 
97  private:
98 
104 
110 
113 
114  public:
115 
117  WriteQueueEntry(const std::string &name)
118  : QueueEntry(name)
119  {}
120 
129  void allocate(Addr blk_addr, unsigned blk_size, PacketPtr pkt,
130  Tick when_ready, Counter _order);
131 
132 
136  void deallocate();
137 
142  int getNumTargets() const
143  { return targets.size(); }
144 
149  bool hasTargets() const { return !targets.empty(); }
150 
155  Target *getTarget() override
156  {
157  assert(hasTargets());
158  return &targets.front();
159  }
160 
164  void popTarget()
165  {
166  targets.pop_front();
167  }
168 
170 
174  void print(std::ostream &os,
175  int verbosity = 0,
176  const std::string &prefix = "") const override;
183  std::string print() const;
184 
185  bool matchBlockAddr(const Addr addr, const bool is_secure) const override;
186  bool matchBlockAddr(const PacketPtr pkt) const override;
187  bool conflictAddr(const QueueEntry* entry) const override;
188 };
189 
190 } // namespace gem5
191 
192 #endif // __MEM_CACHE_WRITE_QUEUE_ENTRY_HH__
gem5::WriteQueueEntry::TargetList
Definition: write_queue_entry.hh:78
queue_entry.hh
gem5::WriteQueueEntry::matchBlockAddr
bool matchBlockAddr(const Addr addr, const bool is_secure) const override
Check if entry corresponds to the one being looked for.
Definition: write_queue_entry.cc:147
gem5::WriteQueueEntry::sendPacket
bool sendPacket(BaseCache &cache) override
Send this queue entry as a downstream packet, with the exact behaviour depending on the specific entr...
Definition: write_queue_entry.cc:141
gem5::WriteQueueEntry::getTarget
Target * getTarget() override
Returns a reference to the first target.
Definition: write_queue_entry.hh:155
gem5::QueueEntry::Target
A queue entry is holding packets that will be serviced as soon as resources are available.
Definition: queue_entry.hh:87
gem5::QueueEntry::order
Counter order
Order number assigned to disambiguate writes and misses.
Definition: queue_entry.hh:113
gem5::WriteQueueEntry::targets
TargetList targets
List of all requests that match the address.
Definition: write_queue_entry.hh:112
gem5::WriteQueueEntry::WriteQueueEntry
WriteQueueEntry(const std::string &name)
A simple constructor.
Definition: write_queue_entry.hh:117
printable.hh
gem5::QueueEntry::readyTime
Tick readyTime
Tick when ready to issue.
Definition: queue_entry.hh:74
packet.hh
gem5::WriteQueueEntry::TargetList::print
void print(std::ostream &os, int verbosity, const std::string &prefix) const
Definition: write_queue_entry.cc:80
gem5::WriteQueueEntry::allocIter
Iterator allocIter
Pointer to this entry on the allocated list.
Definition: write_queue_entry.hh:109
gem5::Printable
Abstract base class for objects which support being printed to a stream for debugging.
Definition: printable.hh:47
gem5::Named::name
virtual std::string name() const
Definition: named.hh:47
gem5::BaseCache
A basic cache interface.
Definition: base.hh:94
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:294
gem5::WriteQueueEntry::print
std::string print() const
A no-args wrapper of print(std::ostream...) meant to be invoked from DPRINTFs avoiding string overhea...
Definition: write_queue_entry.cc:182
gem5::WriteQueueEntry::Iterator
List::iterator Iterator
WriteQueueEntry list iterator.
Definition: write_queue_entry.hh:93
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::WriteQueueEntry::TargetList::add
void add(PacketPtr pkt, Tick readyTime, Counter order)
Definition: write_queue_entry.cc:61
gem5::WriteQueueEntry::TargetList::trySatisfyFunctional
bool trySatisfyFunctional(PacketPtr pkt)
Definition: write_queue_entry.cc:68
gem5::WriteQueueEntry::allocate
void allocate(Addr blk_addr, unsigned blk_size, PacketPtr pkt, Tick when_ready, Counter _order)
Allocate a miss to this entry.
Definition: write_queue_entry.cc:90
gem5::Queue
A high-level queue interface, to be used by both the MSHR queue and the write buffer.
Definition: queue.hh:70
gem5::WriteQueueEntry::popTarget
void popTarget()
Pop first target.
Definition: write_queue_entry.hh:164
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::WriteQueueEntry
Write queue entry.
Definition: write_queue_entry.hh:67
gem5::WriteQueue
A write queue for all eviction packets, i.e.
Definition: write_queue.hh:60
gem5::WriteQueueEntry::trySatisfyFunctional
bool trySatisfyFunctional(PacketPtr pkt)
Definition: write_queue_entry.cc:127
gem5::WriteQueueEntry::deallocate
void deallocate()
Mark this entry as free.
Definition: write_queue_entry.cc:120
types.hh
gem5::X86ISA::os
Bitfield< 17 > os
Definition: misc.hh:810
gem5::statistics::Counter
double Counter
All counters are of 64-bit values.
Definition: types.hh:46
gem5::QueueEntry
A queue entry base class, to be used by both the MSHRs and write-queue entries.
Definition: queue_entry.hh:62
gem5::WriteQueueEntry::getNumTargets
int getNumTargets() const
Returns the current number of allocated targets.
Definition: write_queue_entry.hh:142
gem5::WriteQueueEntry::readyIter
Iterator readyIter
Pointer to this entry on the ready list.
Definition: write_queue_entry.hh:103
gem5::WriteQueueEntry::hasTargets
bool hasTargets() const
Returns true if there are targets left.
Definition: write_queue_entry.hh:149
std::list
STL list class.
Definition: stl.hh:51
gem5::WriteQueueEntry::conflictAddr
bool conflictAddr(const QueueEntry *entry) const override
Check if given entry's packets conflict with this' entries packets.
Definition: write_queue_entry.cc:161
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::WriteQueueEntry::TargetList::TargetList
TargetList()
Definition: write_queue_entry.hh:83
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84
gem5::WriteQueueEntry::List
std::list< WriteQueueEntry * > List
A list of write queue entriess.
Definition: write_queue_entry.hh:91

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