gem5 v24.0.0.0
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SwitchAllocator.hh
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1/*
2 * Copyright (c) 2020 Inria
3 * Copyright (c) 2016 Georgia Institute of Technology
4 * Copyright (c) 2008 Princeton University
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met: redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer;
11 * redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution;
14 * neither the name of the copyright holders nor the names of its
15 * contributors may be used to endorse or promote products derived from
16 * this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
31
32#ifndef __MEM_RUBY_NETWORK_GARNET_0_SWITCHALLOCATOR_HH__
33#define __MEM_RUBY_NETWORK_GARNET_0_SWITCHALLOCATOR_HH__
34
35#include <iostream>
36#include <vector>
37
40
41namespace gem5
42{
43
44namespace ruby
45{
46
47namespace garnet
48{
49
50class Router;
51class InputUnit;
52class OutputUnit;
53
55{
56 public:
57 SwitchAllocator(Router *router);
58 void wakeup();
59 void init();
61 void check_for_wakeup();
62 int get_vnet (int invc);
63 void print(std::ostream& out) const {};
64 void arbitrate_inports();
65 void arbitrate_outports();
66 bool send_allowed(int inport, int invc, int outport, int outvc);
67 int vc_allocate(int outport, int inport, int invc);
68
69 inline double
74 inline double
79
80 void resetStats();
81
82 private:
85
87
93};
94
95} // namespace garnet
96} // namespace ruby
97} // namespace gem5
98
99#endif // __MEM_RUBY_NETWORK_GARNET_0_SWITCHALLOCATOR_HH__
void print(std::ostream &out) const
bool send_allowed(int inport, int invc, int outport, int outvc)
int vc_allocate(int outport, int inport, int invc)
STL vector class.
Definition stl.hh:37
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36

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