| _contextId | gem5::Iris::ThreadContext | protected |
| _cpu | gem5::Iris::ThreadContext | protected |
| _instId | gem5::Iris::ThreadContext | protected |
| _irisPath | gem5::Iris::ThreadContext | protected |
| _isa | gem5::Iris::ThreadContext | protected |
| _mmu | gem5::Iris::ThreadContext | protected |
| _status | gem5::Iris::ThreadContext | protected |
| _system | gem5::Iris::ThreadContext | protected |
| _threadId | gem5::Iris::ThreadContext | protected |
| activate() override | gem5::Iris::ThreadContext | inlinevirtual |
| Active enum value | gem5::ThreadContext | |
| bpAddr | gem5::Iris::ThreadContext | protected |
| BpId typedef | gem5::Iris::ThreadContext | protected |
| BpInfoIt typedef | gem5::Iris::ThreadContext | protected |
| BpInfoMap typedef | gem5::Iris::ThreadContext | protected |
| BpInfoPtr typedef | gem5::Iris::ThreadContext | protected |
| bps | gem5::Iris::ThreadContext | protected |
| breakpointEventStreamId | gem5::Iris::ThreadContext | protected |
| breakpointHit(uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out) | gem5::Iris::ThreadContext | protected |
| call() const | gem5::Iris::ThreadContext | inlineprotected |
| ccRegIds | gem5::Iris::ThreadContext | protected |
| clearArchRegs() override | gem5::Iris::ThreadContext | inlinevirtual |
| client | gem5::Iris::ThreadContext | mutableprotected |
| comInstEventQueue | gem5::Iris::ThreadContext | protected |
| compare(ThreadContext *one, ThreadContext *two) | gem5::ThreadContext | static |
| contextId() const override | gem5::Iris::ThreadContext | inlinevirtual |
| copyArchRegs(gem5::ThreadContext *tc) override | gem5::Iris::ThreadContext | inlinevirtual |
| cpuId() const override | gem5::Iris::ThreadContext | inlinevirtual |
| DefaultFloatResult | gem5::ThreadContext | static |
| DefaultIntResult | gem5::ThreadContext | static |
| delBp(BpInfoIt it) | gem5::Iris::ThreadContext | protected |
| descheduleInstCountEvent(Event *event) override | gem5::Iris::ThreadContext | virtual |
| enableAfterPseudoEvent | gem5::Iris::ThreadContext | protected |
| exit() | gem5::ThreadContext | inlinevirtual |
| extractResourceId(const ResourceMap &resources, const std::string &name) | gem5::Iris::ThreadContext | protected |
| extractResourceMap(ResourceIds &ids, const ResourceMap &resources, const IdxNameMap &idx_names) | gem5::Iris::ThreadContext | protected |
| flattenedIntIds | gem5::Iris::ThreadContext | protected |
| floatResult | gem5::ThreadContext | |
| floats | gem5::ThreadContext | static |
| getBpSpaceIds() const =0 | gem5::Iris::ThreadContext | protectedpure virtual |
| getCCRegFlatRscId(RegIndex cc_reg) const | gem5::Iris::ThreadContext | |
| getCheckerCpuPtr() override | gem5::Iris::ThreadContext | inlinevirtual |
| getCpuPtr() override | gem5::Iris::ThreadContext | inlinevirtual |
| getCurrentInstCount() override | gem5::Iris::ThreadContext | virtual |
| getDecoderPtr() override | gem5::Iris::ThreadContext | inlinevirtual |
| getHtmCheckpointPtr() override | gem5::Iris::ThreadContext | inlinevirtual |
| getIntRegFlatRscId(RegIndex int_reg) const | gem5::Iris::ThreadContext | |
| getIntRegRscId(RegIndex int_reg) const | gem5::Iris::ThreadContext | |
| getIsaPtr() const override | gem5::Iris::ThreadContext | inlinevirtual |
| getMemorySpaceId(const Iris::CanonicalMsn &msn) const | gem5::Iris::ThreadContext | protected |
| getMiscRegRscId(RegIndex misc_reg) const | gem5::Iris::ThreadContext | |
| getMMUPtr() override | gem5::Iris::ThreadContext | inlinevirtual |
| getOrAllocBp(Addr pc) | gem5::Iris::ThreadContext | protected |
| getProcessPtr() override | gem5::Iris::ThreadContext | inlinevirtual |
| getReg(const RegId ®) const override | gem5::Iris::ThreadContext | virtual |
| getReg(const RegId ®, void *val) const override | gem5::Iris::ThreadContext | virtual |
| getSystemPtr() override | gem5::Iris::ThreadContext | inlinevirtual |
| getUseForClone() | gem5::ThreadContext | inline |
| getVecPredRegRscId(RegIndex vec_reg) const | gem5::Iris::ThreadContext | |
| getVecRegRscId(RegIndex vec_reg) const | gem5::Iris::ThreadContext | |
| getWritableReg(const RegId ®) override | gem5::Iris::ThreadContext | virtual |
| getWritableVecPredReg(const RegId ®) | gem5::Iris::ThreadContext | inlinevirtual |
| getWritableVecPredRegFlat(RegIndex idx) | gem5::Iris::ThreadContext | inlinevirtual |
| getWritableVecReg(const RegId ®) | gem5::Iris::ThreadContext | inlinevirtual |
| getWritableVecRegFlat(RegIndex idx) | gem5::Iris::ThreadContext | inlinevirtual |
| halt() override | gem5::Iris::ThreadContext | inlinevirtual |
| Halted enum value | gem5::ThreadContext | |
| Halting enum value | gem5::ThreadContext | |
| htmAbortTransaction(uint64_t htm_uid, HtmFailureFaultCause cause) override | gem5::Iris::ThreadContext | inlinevirtual |
| icountRscId | gem5::Iris::ThreadContext | protected |
| IdxNameMap typedef | gem5::Iris::ThreadContext | |
| initEventStreamId | gem5::Iris::ThreadContext | protected |
| initFromIrisInstance(const ResourceMap &resources) | gem5::Iris::ThreadContext | protectedvirtual |
| installBp(BpInfoIt it) | gem5::Iris::ThreadContext | protected |
| instanceRegistryChanged(uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out) | gem5::Iris::ThreadContext | protected |
| intOffset | gem5::ThreadContext | |
| intReg32Ids | gem5::Iris::ThreadContext | protected |
| intReg64Ids | gem5::Iris::ThreadContext | protected |
| intResult | gem5::ThreadContext | |
| ints | gem5::ThreadContext | static |
| maintainStepping() | gem5::Iris::ThreadContext | protected |
| memorySpaceIds | gem5::Iris::ThreadContext | protected |
| MemorySpaceMap typedef | gem5::Iris::ThreadContext | |
| memorySpaces | gem5::Iris::ThreadContext | protected |
| miscRegIds | gem5::Iris::ThreadContext | protected |
| noThrow() const | gem5::Iris::ThreadContext | inlineprotected |
| pc | gem5::Iris::ThreadContext | mutableprotected |
| pcRscId | gem5::Iris::ThreadContext | protected |
| pcState() const override | gem5::Iris::ThreadContext | virtual |
| pcState(const PCStateBase &val) override | gem5::Iris::ThreadContext | virtual |
| gem5::ThreadContext::pcState(Addr addr) | gem5::ThreadContext | inline |
| pcStateNoRecord(const PCStateBase &val) override | gem5::Iris::ThreadContext | inlinevirtual |
| phaseInitLeave(uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out) | gem5::Iris::ThreadContext | protected |
| quiesce() | gem5::ThreadContext | |
| quiesceTick(Tick resume) | gem5::ThreadContext | |
| readCCReg(RegIndex reg_idx) const | gem5::Iris::ThreadContext | inlinevirtual |
| readCCRegFlat(RegIndex idx) const | gem5::Iris::ThreadContext | virtual |
| readIntReg(RegIndex reg_idx) const | gem5::Iris::ThreadContext | virtual |
| readIntRegFlat(RegIndex idx) const | gem5::Iris::ThreadContext | virtual |
| readLastActivate() override | gem5::Iris::ThreadContext | inlinevirtual |
| readLastSuspend() override | gem5::Iris::ThreadContext | inlinevirtual |
| readMem(iris::MemorySpaceId space, Addr addr, void *p, size_t size) | gem5::Iris::ThreadContext | protected |
| readMemWithCurrentMsn(Addr vaddr, size_t size, char *data) | gem5::Iris::ThreadContext | |
| readMiscReg(RegIndex misc_reg) override | gem5::Iris::ThreadContext | inlinevirtual |
| readMiscRegNoEffect(RegIndex misc_reg) const override | gem5::Iris::ThreadContext | virtual |
| readStCondFailures() const override | gem5::Iris::ThreadContext | inlinevirtual |
| readVecElem(const RegId ®) const | gem5::Iris::ThreadContext | inlinevirtual |
| readVecElemFlat(RegIndex idx) const | gem5::Iris::ThreadContext | inlinevirtual |
| readVecPredReg(const RegId ®) const | gem5::Iris::ThreadContext | virtual |
| readVecPredRegFlat(RegIndex idx) const | gem5::Iris::ThreadContext | virtual |
| readVecReg(const RegId ®) const | gem5::Iris::ThreadContext | virtual |
| readVecRegFlat(RegIndex idx) const | gem5::Iris::ThreadContext | virtual |
| regEventStreamId | gem5::Iris::ThreadContext | protected |
| regStats(const std::string &name) override | gem5::Iris::ThreadContext | inlinevirtual |
| remove(PCEvent *e) override | gem5::Iris::ThreadContext | virtual |
| ResourceIds typedef | gem5::Iris::ThreadContext | |
| ResourceMap typedef | gem5::Iris::ThreadContext | |
| schedule(PCEvent *e) override | gem5::Iris::ThreadContext | virtual |
| scheduleInstCountEvent(Event *event, Tick count) override | gem5::Iris::ThreadContext | virtual |
| semihostingEvent(uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out) | gem5::Iris::ThreadContext | protected |
| semihostingEventStreamId | gem5::Iris::ThreadContext | protected |
| sendFunctional(PacketPtr pkt) override | gem5::Iris::ThreadContext | virtual |
| setCCReg(RegIndex reg_idx, RegVal val) | gem5::Iris::ThreadContext | inlinevirtual |
| setCCRegFlat(RegIndex idx, RegVal val) | gem5::Iris::ThreadContext | virtual |
| setContextId(int id) override | gem5::Iris::ThreadContext | inlinevirtual |
| setHtmCheckpointPtr(BaseHTMCheckpointPtr cpt) override | gem5::Iris::ThreadContext | inlinevirtual |
| setIntReg(RegIndex reg_idx, RegVal val) | gem5::Iris::ThreadContext | virtual |
| setIntRegFlat(RegIndex idx, uint64_t val) | gem5::Iris::ThreadContext | virtual |
| setMiscReg(RegIndex misc_reg, const RegVal val) override | gem5::Iris::ThreadContext | inlinevirtual |
| setMiscRegNoEffect(RegIndex misc_reg, const RegVal val) override | gem5::Iris::ThreadContext | virtual |
| setProcessPtr(Process *p) override | gem5::Iris::ThreadContext | inlinevirtual |
| setReg(const RegId ®, RegVal val) override | gem5::Iris::ThreadContext | virtual |
| setReg(const RegId ®, const void *val) override | gem5::Iris::ThreadContext | virtual |
| setStatus(Status new_status) override | gem5::Iris::ThreadContext | virtual |
| setStCondFailures(unsigned sc_failures) override | gem5::Iris::ThreadContext | inlinevirtual |
| setThreadId(int id) override | gem5::Iris::ThreadContext | inlinevirtual |
| setUseForClone(bool new_val) | gem5::ThreadContext | inline |
| setVecElem(const RegId ®, RegVal val) | gem5::Iris::ThreadContext | inlinevirtual |
| setVecElemFlat(RegIndex idx, RegVal val) | gem5::Iris::ThreadContext | inlinevirtual |
| setVecPredReg(const RegId ®, const ArmISA::VecPredRegContainer &val) | gem5::Iris::ThreadContext | inlinevirtual |
| setVecPredRegFlat(RegIndex idx, const ArmISA::VecPredRegContainer &val) | gem5::Iris::ThreadContext | inlinevirtual |
| setVecReg(const RegId ®, const ArmISA::VecRegContainer &val) | gem5::Iris::ThreadContext | inlinevirtual |
| setVecRegFlat(RegIndex idx, const ArmISA::VecRegContainer &val) | gem5::Iris::ThreadContext | inlinevirtual |
| simulationTimeEvent(uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out) | gem5::Iris::ThreadContext | protected |
| socketId() const override | gem5::Iris::ThreadContext | inlinevirtual |
| Status enum name | gem5::ThreadContext | |
| status() const override | gem5::Iris::ThreadContext | virtual |
| suspend() override | gem5::Iris::ThreadContext | inlinevirtual |
| Suspended enum value | gem5::ThreadContext | |
| takeOverFrom(gem5::ThreadContext *old_context) override | gem5::Iris::ThreadContext | inlinevirtual |
| ThreadContext(gem5::BaseCPU *cpu, int id, System *system, gem5::BaseMMU *mmu, gem5::BaseISA *isa, iris::IrisConnectionInterface *iris_if, const std::string &iris_path) | gem5::Iris::ThreadContext | |
| threadId() const override | gem5::Iris::ThreadContext | inlinevirtual |
| timeEventStreamId | gem5::Iris::ThreadContext | protected |
| translateAddress(Addr &paddr, iris::MemorySpaceId p_space, Addr vaddr, iris::MemorySpaceId v_space) | gem5::Iris::ThreadContext | protected |
| translateAddress(Addr &paddr, Addr vaddr)=0 | gem5::Iris::ThreadContext | pure virtual |
| translations | gem5::Iris::ThreadContext | protected |
| uninstallBp(BpInfoIt it) | gem5::Iris::ThreadContext | protected |
| useForClone | gem5::ThreadContext | protected |
| vecPredRegIds | gem5::Iris::ThreadContext | protected |
| vecPredRegs | gem5::Iris::ThreadContext | mutableprotected |
| vecRegIds | gem5::Iris::ThreadContext | protected |
| vecRegs | gem5::Iris::ThreadContext | mutableprotected |
| writeMem(iris::MemorySpaceId space, Addr addr, const void *p, size_t size) | gem5::Iris::ThreadContext | protected |
| writeMemWithCurrentMsn(Addr vaddr, size_t size, const char *data) | gem5::Iris::ThreadContext | |
| ~ThreadContext() | gem5::Iris::ThreadContext | virtual |