gem5  v22.0.0.2
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gem5::Iris::ThreadContext Class Referenceabstract

#include <thread_context.hh>

Inheritance diagram for gem5::Iris::ThreadContext:
gem5::ThreadContext gem5::PCEventScope gem5::fastmodel::CortexA76TC gem5::fastmodel::CortexR52TC

Classes

struct  BpInfo
 

Public Types

typedef std::map< std::string, iris::ResourceInfo > ResourceMap
 
typedef std::vector< iris::ResourceId > ResourceIds
 
typedef std::map< int, std::string > IdxNameMap
 
typedef std::unordered_map< Iris::CanonicalMsn, iris::MemorySpaceId > MemorySpaceMap
 
- Public Types inherited from gem5::ThreadContext
enum  Status { Active, Suspended, Halting, Halted }
 

Public Member Functions

 ThreadContext (gem5::BaseCPU *cpu, int id, System *system, gem5::BaseMMU *mmu, gem5::BaseISA *isa, iris::IrisConnectionInterface *iris_if, const std::string &iris_path)
 
virtual ~ThreadContext ()
 
virtual bool translateAddress (Addr &paddr, Addr vaddr)=0
 
bool schedule (PCEvent *e) override
 
bool remove (PCEvent *e) override
 
void scheduleInstCountEvent (Event *event, Tick count) override
 
void descheduleInstCountEvent (Event *event) override
 
Tick getCurrentInstCount () override
 
gem5::BaseCPU * getCpuPtr () override
 
int cpuId () const override
 
uint32_t socketId () const override
 
int threadId () const override
 
void setThreadId (int id) override
 
int contextId () const override
 
void setContextId (int id) override
 
BaseMMUgetMMUPtr () override
 
CheckerCPUgetCheckerCpuPtr () override
 
InstDecodergetDecoderPtr () override
 
SystemgetSystemPtr () override
 
BaseISAgetIsaPtr () const override
 
void sendFunctional (PacketPtr pkt) override
 
ProcessgetProcessPtr () override
 
void setProcessPtr (Process *p) override
 
Status status () const override
 
void setStatus (Status new_status) override
 
void activate () override
 Set the status to Active. More...
 
void suspend () override
 Set the status to Suspended. More...
 
void halt () override
 Set the status to Halted. More...
 
void takeOverFrom (gem5::ThreadContext *old_context) override
 
void regStats (const std::string &name) override
 
Tick readLastActivate () override
 
Tick readLastSuspend () override
 
void copyArchRegs (gem5::ThreadContext *tc) override
 
void clearArchRegs () override
 
RegVal getReg (const RegId &reg) const override
 
void getReg (const RegId &reg, void *val) const override
 
void * getWritableReg (const RegId &reg) override
 
void setReg (const RegId &reg, RegVal val) override
 
void setReg (const RegId &reg, const void *val) override
 
virtual RegVal readIntReg (RegIndex reg_idx) const
 
virtual const ArmISA::VecRegContainerreadVecReg (const RegId &reg) const
 
virtual ArmISA::VecRegContainergetWritableVecReg (const RegId &reg)
 
virtual RegVal readVecElem (const RegId &reg) const
 
virtual const ArmISA::VecPredRegContainerreadVecPredReg (const RegId &reg) const
 
virtual ArmISA::VecPredRegContainergetWritableVecPredReg (const RegId &reg)
 
virtual RegVal readCCReg (RegIndex reg_idx) const
 
virtual void setIntReg (RegIndex reg_idx, RegVal val)
 
virtual void setVecReg (const RegId &reg, const ArmISA::VecRegContainer &val)
 
virtual void setVecElem (const RegId &reg, RegVal val)
 
virtual void setVecPredReg (const RegId &reg, const ArmISA::VecPredRegContainer &val)
 
virtual void setCCReg (RegIndex reg_idx, RegVal val)
 
void pcStateNoRecord (const PCStateBase &val) override
 
const PCStateBasepcState () const override
 
void pcState (const PCStateBase &val) override
 
RegVal readMiscRegNoEffect (RegIndex misc_reg) const override
 
RegVal readMiscReg (RegIndex misc_reg) override
 
void setMiscRegNoEffect (RegIndex misc_reg, const RegVal val) override
 
void setMiscReg (RegIndex misc_reg, const RegVal val) override
 
RegId flattenRegId (const RegId &regId) const override
 
unsigned readStCondFailures () const override
 
void setStCondFailures (unsigned sc_failures) override
 
void htmAbortTransaction (uint64_t htm_uid, HtmFailureFaultCause cause) override
 
BaseHTMCheckpointPtrgetHtmCheckpointPtr () override
 
void setHtmCheckpointPtr (BaseHTMCheckpointPtr cpt) override
 
RegVal getRegFlat (const RegId &reg) const override
 Flat register interfaces. More...
 
void getRegFlat (const RegId &reg, void *val) const override
 
void * getWritableRegFlat (const RegId &reg) override
 
void setRegFlat (const RegId &reg, RegVal val) override
 
void setRegFlat (const RegId &reg, const void *val) override
 
virtual RegVal readIntRegFlat (RegIndex idx) const
 
virtual void setIntRegFlat (RegIndex idx, uint64_t val)
 
virtual const ArmISA::VecRegContainerreadVecRegFlat (RegIndex idx) const
 
virtual ArmISA::VecRegContainergetWritableVecRegFlat (RegIndex idx)
 
virtual void setVecRegFlat (RegIndex idx, const ArmISA::VecRegContainer &val)
 
virtual RegVal readVecElemFlat (RegIndex idx) const
 
virtual void setVecElemFlat (RegIndex idx, RegVal val)
 
virtual ArmISA::VecPredRegContainer readVecPredRegFlat (RegIndex idx) const
 
virtual ArmISA::VecPredRegContainergetWritableVecPredRegFlat (RegIndex idx)
 
virtual void setVecPredRegFlat (RegIndex idx, const ArmISA::VecPredRegContainer &val)
 
virtual RegVal readCCRegFlat (RegIndex idx) const
 
virtual void setCCRegFlat (RegIndex idx, RegVal val)
 
- Public Member Functions inherited from gem5::ThreadContext
bool getUseForClone ()
 
void setUseForClone (bool new_val)
 
void quiesce ()
 Quiesce thread context. More...
 
void quiesceTick (Tick resume)
 Quiesce, suspend, and schedule activate at resume. More...
 
RegVal readIntReg (RegIndex reg_idx) const
 
RegVal readFloatReg (RegIndex reg_idx) const
 
TheISA::VecRegContainer readVecReg (const RegId &reg) const
 
TheISA::VecRegContainer & getWritableVecReg (const RegId &reg)
 
RegVal readVecElem (const RegId &reg) const
 
RegVal readCCReg (RegIndex reg_idx) const
 
void setIntReg (RegIndex reg_idx, RegVal val)
 
void setFloatReg (RegIndex reg_idx, RegVal val)
 
void setVecReg (const RegId &reg, const TheISA::VecRegContainer &val)
 
void setVecElem (const RegId &reg, RegVal val)
 
void setCCReg (RegIndex reg_idx, RegVal val)
 
void pcState (Addr addr)
 
virtual int exit ()
 
RegVal readIntRegFlat (RegIndex idx) const
 
void setIntRegFlat (RegIndex idx, RegVal val)
 
RegVal readFloatRegFlat (RegIndex idx) const
 
void setFloatRegFlat (RegIndex idx, RegVal val)
 
TheISA::VecRegContainer readVecRegFlat (RegIndex idx) const
 
TheISA::VecRegContainer & getWritableVecRegFlat (RegIndex idx)
 
void setVecRegFlat (RegIndex idx, const TheISA::VecRegContainer &val)
 
RegVal readVecElemFlat (RegIndex idx) const
 
void setVecElemFlat (RegIndex idx, RegVal val)
 
RegVal readCCRegFlat (RegIndex idx) const
 
void setCCRegFlat (RegIndex idx, RegVal val)
 

Protected Types

using BpId = uint64_t
 
using BpInfoPtr = std::unique_ptr< BpInfo >
 
using BpInfoMap = std::map< Addr, BpInfoPtr >
 
using BpInfoIt = BpInfoMap::iterator
 

Protected Member Functions

virtual void initFromIrisInstance (const ResourceMap &resources)
 
iris::ResourceId extractResourceId (const ResourceMap &resources, const std::string &name)
 
void extractResourceMap (ResourceIds &ids, const ResourceMap &resources, const IdxNameMap &idx_names)
 
iris::MemorySpaceId getMemorySpaceId (const Iris::CanonicalMsn &msn) const
 
void maintainStepping ()
 
BpInfoIt getOrAllocBp (Addr pc)
 
void installBp (BpInfoIt it)
 
void uninstallBp (BpInfoIt it)
 
void delBp (BpInfoIt it)
 
virtual const std::vector< iris::MemorySpaceId > & getBpSpaceIds () const =0
 
iris::IrisErrorCode instanceRegistryChanged (uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)
 
iris::IrisErrorCode phaseInitLeave (uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)
 
iris::IrisErrorCode simulationTimeEvent (uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)
 
iris::IrisErrorCode breakpointHit (uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)
 
iris::IrisErrorCode semihostingEvent (uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)
 
iris::IrisCppAdapter & call () const
 
iris::IrisCppAdapter & noThrow () const
 
void readMem (iris::MemorySpaceId space, Addr addr, void *p, size_t size)
 
void writeMem (iris::MemorySpaceId space, Addr addr, const void *p, size_t size)
 
bool translateAddress (Addr &paddr, iris::MemorySpaceId p_space, Addr vaddr, iris::MemorySpaceId v_space)
 

Protected Attributes

gem5::BaseCPU * _cpu
 
int _threadId
 
ContextID _contextId
 
System_system
 
gem5::BaseMMU_mmu
 
gem5::BaseISA_isa
 
std::string _irisPath
 
iris::InstanceId _instId = iris::IRIS_UINT64_MAX
 
std::vector< ArmISA::VecRegContainervecRegs
 
std::vector< ArmISA::VecPredRegContainervecPredRegs
 
Status _status = Active
 
EventenableAfterPseudoEvent
 
ResourceIds miscRegIds
 
ResourceIds intReg32Ids
 
ResourceIds intReg64Ids
 
ResourceIds flattenedIntIds
 
ResourceIds ccRegIds
 
iris::ResourceId pcRscId = iris::IRIS_UINT64_MAX
 
iris::ResourceId icountRscId
 
ResourceIds vecRegIds
 
ResourceIds vecPredRegIds
 
std::vector< iris::MemorySpaceInfo > memorySpaces
 
std::vector< iris::MemorySupportedAddressTranslationResult > translations
 
MemorySpaceMap memorySpaceIds
 
EventQueue comInstEventQueue
 
BpInfoMap bps
 
iris::EventStreamId regEventStreamId
 
iris::EventStreamId initEventStreamId
 
iris::EventStreamId timeEventStreamId
 
iris::EventStreamId breakpointEventStreamId
 
iris::EventStreamId semihostingEventStreamId
 
iris::IrisInstance client
 
ArmISA::PCState pc
 
- Protected Attributes inherited from gem5::ThreadContext
bool useForClone = false
 

Additional Inherited Members

- Static Public Member Functions inherited from gem5::ThreadContext
static void compare (ThreadContext *one, ThreadContext *two)
 function to compare two thread contexts (for debugging) More...
 
- Public Attributes inherited from gem5::ThreadContext
int intResult = DefaultIntResult
 
double floatResult = DefaultFloatResult
 
int intOffset = 0
 
- Static Public Attributes inherited from gem5::ThreadContext
static const int ints []
 
static const double floats []
 
static const int DefaultIntResult = 0
 
static const double DefaultFloatResult = 0.0
 

Detailed Description

Definition at line 53 of file thread_context.hh.

Member Typedef Documentation

◆ BpId

using gem5::Iris::ThreadContext::BpId = uint64_t
protected

Definition at line 116 of file thread_context.hh.

◆ BpInfoIt

using gem5::Iris::ThreadContext::BpInfoIt = BpInfoMap::iterator
protected

Definition at line 133 of file thread_context.hh.

◆ BpInfoMap

using gem5::Iris::ThreadContext::BpInfoMap = std::map<Addr, BpInfoPtr>
protected

Definition at line 132 of file thread_context.hh.

◆ BpInfoPtr

using gem5::Iris::ThreadContext::BpInfoPtr = std::unique_ptr<BpInfo>
protected

Definition at line 131 of file thread_context.hh.

◆ IdxNameMap

typedef std::map<int, std::string> gem5::Iris::ThreadContext::IdxNameMap

Definition at line 59 of file thread_context.hh.

◆ MemorySpaceMap

typedef std::unordered_map<Iris::CanonicalMsn, iris::MemorySpaceId> gem5::Iris::ThreadContext::MemorySpaceMap

Definition at line 62 of file thread_context.hh.

◆ ResourceIds

Definition at line 58 of file thread_context.hh.

◆ ResourceMap

typedef std::map<std::string, iris::ResourceInfo> gem5::Iris::ThreadContext::ResourceMap

Definition at line 56 of file thread_context.hh.

Constructor & Destructor Documentation

◆ ThreadContext()

gem5::Iris::ThreadContext::ThreadContext ( gem5::BaseCPU *  cpu,
int  id,
System system,
gem5::BaseMMU mmu,
gem5::BaseISA isa,
iris::IrisConnectionInterface *  iris_if,
const std::string &  iris_path 
)

◆ ~ThreadContext()

gem5::Iris::ThreadContext::~ThreadContext ( )
virtual

Member Function Documentation

◆ activate()

void gem5::Iris::ThreadContext::activate ( )
inlineoverridevirtual

Set the status to Active.

Implements gem5::ThreadContext.

Definition at line 243 of file thread_context.hh.

References gem5::ThreadContext::Active, and setStatus().

◆ breakpointHit()

iris::IrisErrorCode gem5::Iris::ThreadContext::breakpointHit ( uint64_t  esId,
const iris::IrisValueMap &  fields,
uint64_t  time,
uint64_t  sInstId,
bool  syncEc,
std::string &  error_message_out 
)
protected

Definition at line 284 of file thread_context.cc.

References gem5::ArmISA::e, getOrAllocBp(), and pc.

◆ call()

iris::IrisCppAdapter& gem5::Iris::ThreadContext::call ( ) const
inlineprotected

◆ clearArchRegs()

void gem5::Iris::ThreadContext::clearArchRegs ( )
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 274 of file thread_context.hh.

References warn.

◆ contextId()

int gem5::Iris::ThreadContext::contextId ( ) const
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 204 of file thread_context.hh.

References _contextId.

◆ copyArchRegs()

void gem5::Iris::ThreadContext::copyArchRegs ( gem5::ThreadContext tc)
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 268 of file thread_context.hh.

References panic.

◆ cpuId()

int gem5::Iris::ThreadContext::cpuId ( ) const
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 198 of file thread_context.hh.

References _cpu.

◆ delBp()

void gem5::Iris::ThreadContext::delBp ( BpInfoIt  it)
protected

Definition at line 198 of file thread_context.cc.

References bps, panic_if, and uninstallBp().

Referenced by remove().

◆ descheduleInstCountEvent()

void gem5::Iris::ThreadContext::descheduleInstCountEvent ( Event event)
overridevirtual

◆ extractResourceId()

iris::ResourceId gem5::Iris::ThreadContext::extractResourceId ( const ResourceMap resources,
const std::string &  name 
)
protected

◆ extractResourceMap()

void gem5::Iris::ThreadContext::extractResourceMap ( ResourceIds ids,
const ResourceMap resources,
const IdxNameMap idx_names 
)
protected

◆ flattenRegId()

RegId gem5::Iris::ThreadContext::flattenRegId ( const RegId regId) const
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 365 of file thread_context.hh.

References panic.

◆ getBpSpaceIds()

virtual const std::vector<iris::MemorySpaceId>& gem5::Iris::ThreadContext::getBpSpaceIds ( ) const
protectedpure virtual

◆ getCheckerCpuPtr()

CheckerCPU* gem5::Iris::ThreadContext::getCheckerCpuPtr ( )
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 213 of file thread_context.hh.

◆ getCpuPtr()

gem5::BaseCPU* gem5::Iris::ThreadContext::getCpuPtr ( )
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 197 of file thread_context.hh.

References _cpu.

Referenced by semihostingEvent(), setStatus(), and ~ThreadContext().

◆ getCurrentInstCount()

Tick gem5::Iris::ThreadContext::getCurrentInstCount ( )
overridevirtual

Implements gem5::ThreadContext.

Definition at line 509 of file thread_context.cc.

References _instId, call(), gem5::X86ISA::count, and panic_if.

Referenced by maintainStepping(), and scheduleInstCountEvent().

◆ getDecoderPtr()

InstDecoder* gem5::Iris::ThreadContext::getDecoderPtr ( )
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 215 of file thread_context.hh.

References panic.

◆ getHtmCheckpointPtr()

BaseHTMCheckpointPtr& gem5::Iris::ThreadContext::getHtmCheckpointPtr ( )
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 454 of file thread_context.hh.

References panic.

◆ getIsaPtr()

BaseISA* gem5::Iris::ThreadContext::getIsaPtr ( ) const
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 223 of file thread_context.hh.

References _isa.

◆ getMemorySpaceId()

iris::MemorySpaceId gem5::Iris::ThreadContext::getMemorySpaceId ( const Iris::CanonicalMsn msn) const
protected

◆ getMMUPtr()

BaseMMU* gem5::Iris::ThreadContext::getMMUPtr ( )
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 208 of file thread_context.hh.

References _mmu.

◆ getOrAllocBp()

ThreadContext::BpInfoIt gem5::Iris::ThreadContext::getOrAllocBp ( Addr  pc)
protected

Definition at line 165 of file thread_context.cc.

References bps, panic_if, and pc.

Referenced by breakpointHit(), remove(), and schedule().

◆ getProcessPtr()

Process* gem5::Iris::ThreadContext::getProcessPtr ( )
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 231 of file thread_context.hh.

References panic.

◆ getReg() [1/2]

RegVal gem5::Iris::ThreadContext::getReg ( const RegId reg) const
overridevirtual

Reimplemented from gem5::ThreadContext.

Definition at line 609 of file thread_context.cc.

References gem5::X86ISA::reg, and gem5::X86ISA::val.

◆ getReg() [2/2]

void gem5::Iris::ThreadContext::getReg ( const RegId reg,
void *  val 
) const
overridevirtual

◆ getRegFlat() [1/2]

RegVal gem5::Iris::ThreadContext::getRegFlat ( const RegId reg) const
overridevirtual

Flat register interfaces.

Some architectures have different registers visible in different modes. Such architectures "flatten" a register (see flattenRegId()) to map it into the gem5 register file. This interface provides a flat interface to the underlying register file, which allows for example serialization code to access all registers.

Reimplemented from gem5::ThreadContext.

Definition at line 699 of file thread_context.cc.

References gem5::X86ISA::reg, and gem5::X86ISA::val.

◆ getRegFlat() [2/2]

void gem5::Iris::ThreadContext::getRegFlat ( const RegId reg,
void *  val 
) const
overridevirtual

◆ getSystemPtr()

System* gem5::Iris::ThreadContext::getSystemPtr ( )
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 220 of file thread_context.hh.

References _cpu.

◆ getWritableReg()

void * gem5::Iris::ThreadContext::getWritableReg ( const RegId reg)
overridevirtual

◆ getWritableRegFlat()

void * gem5::Iris::ThreadContext::getWritableRegFlat ( const RegId reg)
overridevirtual

◆ getWritableVecPredReg()

virtual ArmISA::VecPredRegContainer& gem5::Iris::ThreadContext::getWritableVecPredReg ( const RegId reg)
inlinevirtual

Definition at line 307 of file thread_context.hh.

References panic.

Referenced by getWritableReg().

◆ getWritableVecPredRegFlat()

virtual ArmISA::VecPredRegContainer& gem5::Iris::ThreadContext::getWritableVecPredRegFlat ( RegIndex  idx)
inlinevirtual

Definition at line 431 of file thread_context.hh.

References panic.

Referenced by getWritableRegFlat().

◆ getWritableVecReg()

virtual ArmISA::VecRegContainer& gem5::Iris::ThreadContext::getWritableVecReg ( const RegId reg)
inlinevirtual

Definition at line 293 of file thread_context.hh.

References panic.

Referenced by getWritableReg().

◆ getWritableVecRegFlat()

virtual ArmISA::VecRegContainer& gem5::Iris::ThreadContext::getWritableVecRegFlat ( RegIndex  idx)
inlinevirtual

Definition at line 408 of file thread_context.hh.

References panic.

Referenced by getWritableRegFlat().

◆ halt()

void gem5::Iris::ThreadContext::halt ( )
inlineoverridevirtual

Set the status to Halted.

Implements gem5::ThreadContext.

Definition at line 245 of file thread_context.hh.

References gem5::ThreadContext::Halted, and setStatus().

◆ htmAbortTransaction()

void gem5::Iris::ThreadContext::htmAbortTransaction ( uint64_t  htm_uid,
HtmFailureFaultCause  cause 
)
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 448 of file thread_context.hh.

References panic.

◆ initFromIrisInstance()

void gem5::Iris::ThreadContext::initFromIrisInstance ( const ResourceMap resources)
protectedvirtual

◆ installBp()

void gem5::Iris::ThreadContext::installBp ( BpInfoIt  it)
protected

Definition at line 178 of file thread_context.cc.

References _instId, call(), getBpSpaceIds(), gem5::ArmISA::id, and pc.

Referenced by initFromIrisInstance(), and schedule().

◆ instanceRegistryChanged()

iris::IrisErrorCode gem5::Iris::ThreadContext::instanceRegistryChanged ( uint64_t  esId,
const iris::IrisValueMap &  fields,
uint64_t  time,
uint64_t  sInstId,
bool  syncEc,
std::string &  error_message_out 
)
protected

Definition at line 210 of file thread_context.cc.

References _instId, _irisPath, gem5::MipsISA::event, gem5::ArmISA::id, name(), and panic.

◆ maintainStepping()

void gem5::Iris::ThreadContext::maintainStepping ( )
protected

◆ noThrow()

iris::IrisCppAdapter& gem5::Iris::ThreadContext::noThrow ( ) const
inlineprotected

Definition at line 170 of file thread_context.hh.

References client.

Referenced by ThreadContext(), and translateAddress().

◆ pcState() [1/2]

const PCStateBase & gem5::Iris::ThreadContext::pcState ( ) const
overridevirtual

◆ pcState() [2/2]

void gem5::Iris::ThreadContext::pcState ( const PCStateBase val)
overridevirtual

◆ pcStateNoRecord()

void gem5::Iris::ThreadContext::pcStateNoRecord ( const PCStateBase val)
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 345 of file thread_context.hh.

References pcState(), and gem5::X86ISA::val.

◆ phaseInitLeave()

iris::IrisErrorCode gem5::Iris::ThreadContext::phaseInitLeave ( uint64_t  esId,
const iris::IrisValueMap &  fields,
uint64_t  time,
uint64_t  sInstId,
bool  syncEc,
std::string &  error_message_out 
)
protected

Definition at line 232 of file thread_context.cc.

References _instId, call(), initFromIrisInstance(), and name().

◆ readCCReg()

virtual RegVal gem5::Iris::ThreadContext::readCCReg ( RegIndex  reg_idx) const
inlinevirtual

Definition at line 313 of file thread_context.hh.

References readCCRegFlat().

Referenced by getReg().

◆ readCCRegFlat()

RegVal gem5::Iris::ThreadContext::readCCRegFlat ( RegIndex  idx) const
virtual

◆ readIntReg()

RegVal gem5::Iris::ThreadContext::readIntReg ( RegIndex  reg_idx) const
virtual

◆ readIntRegFlat()

RegVal gem5::Iris::ThreadContext::readIntRegFlat ( RegIndex  idx) const
virtual

Reimplemented in gem5::fastmodel::CortexR52TC, and gem5::fastmodel::CortexA76TC.

Definition at line 813 of file thread_context.cc.

References _instId, call(), and flattenedIntIds.

Referenced by getRegFlat().

◆ readLastActivate()

Tick gem5::Iris::ThreadContext::readLastActivate ( )
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 258 of file thread_context.hh.

References panic.

◆ readLastSuspend()

Tick gem5::Iris::ThreadContext::readLastSuspend ( )
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 262 of file thread_context.hh.

References panic.

◆ readMem()

void gem5::Iris::ThreadContext::readMem ( iris::MemorySpaceId  space,
Addr  addr,
void *  p,
size_t  size 
)
protected

◆ readMiscReg()

RegVal gem5::Iris::ThreadContext::readMiscReg ( RegIndex  misc_reg)
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 352 of file thread_context.hh.

References readMiscRegNoEffect().

◆ readMiscRegNoEffect()

RegVal gem5::Iris::ThreadContext::readMiscRegNoEffect ( RegIndex  misc_reg) const
overridevirtual

◆ readStCondFailures()

unsigned gem5::Iris::ThreadContext::readStCondFailures ( ) const
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 373 of file thread_context.hh.

References panic.

◆ readVecElem()

virtual RegVal gem5::Iris::ThreadContext::readVecElem ( const RegId reg) const
inlinevirtual

Definition at line 299 of file thread_context.hh.

References panic.

Referenced by getReg().

◆ readVecElemFlat()

virtual RegVal gem5::Iris::ThreadContext::readVecElemFlat ( RegIndex  idx) const
inlinevirtual

Definition at line 419 of file thread_context.hh.

References panic.

Referenced by getRegFlat().

◆ readVecPredReg()

const ArmISA::VecPredRegContainer & gem5::Iris::ThreadContext::readVecPredReg ( const RegId reg) const
virtual

◆ readVecPredRegFlat()

ArmISA::VecPredRegContainer gem5::Iris::ThreadContext::readVecPredRegFlat ( RegIndex  idx) const
virtual

Definition at line 914 of file thread_context.cc.

References readVecPredReg(), and gem5::VecPredRegClass.

Referenced by getRegFlat().

◆ readVecReg()

const ArmISA::VecRegContainer & gem5::Iris::ThreadContext::readVecReg ( const RegId reg) const
virtual

Reimplemented in gem5::fastmodel::CortexR52TC.

Definition at line 857 of file thread_context.cc.

References _instId, call(), gem5::RegId::index(), gem5::X86ISA::reg, vecRegIds, and vecRegs.

Referenced by getReg(), and readVecRegFlat().

◆ readVecRegFlat()

const ArmISA::VecRegContainer & gem5::Iris::ThreadContext::readVecRegFlat ( RegIndex  idx) const
virtual

Definition at line 879 of file thread_context.cc.

References readVecReg(), and gem5::VecRegClass.

Referenced by getRegFlat().

◆ regStats()

void gem5::Iris::ThreadContext::regStats ( const std::string &  name)
inlineoverridevirtual

Reimplemented from gem5::ThreadContext.

Definition at line 253 of file thread_context.hh.

◆ remove()

bool gem5::Iris::ThreadContext::remove ( PCEvent e)
overridevirtual

Implements gem5::PCEventScope.

Definition at line 428 of file thread_context.cc.

References delBp(), gem5::ArmISA::e, and getOrAllocBp().

◆ schedule()

bool gem5::Iris::ThreadContext::schedule ( PCEvent e)
overridevirtual

Implements gem5::PCEventScope.

Definition at line 416 of file thread_context.cc.

References _instId, gem5::ArmISA::e, getOrAllocBp(), and installBp().

◆ scheduleInstCountEvent()

void gem5::Iris::ThreadContext::scheduleInstCountEvent ( Event event,
Tick  count 
)
overridevirtual

◆ semihostingEvent()

iris::IrisErrorCode gem5::Iris::ThreadContext::semihostingEvent ( uint64_t  esId,
const iris::IrisValueMap &  fields,
uint64_t  time,
uint64_t  sInstId,
bool  syncEc,
std::string &  error_message_out 
)
protected

◆ sendFunctional()

void gem5::Iris::ThreadContext::sendFunctional ( PacketPtr  pkt)
overridevirtual

◆ setCCReg()

virtual void gem5::Iris::ThreadContext::setCCReg ( RegIndex  reg_idx,
RegVal  val 
)
inlinevirtual

Definition at line 340 of file thread_context.hh.

References setCCRegFlat(), and gem5::X86ISA::val.

Referenced by setReg().

◆ setCCRegFlat()

void gem5::Iris::ThreadContext::setCCRegFlat ( RegIndex  idx,
RegVal  val 
)
virtual

◆ setContextId()

void gem5::Iris::ThreadContext::setContextId ( int  id)
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 205 of file thread_context.hh.

References _contextId, and gem5::ArmISA::id.

◆ setHtmCheckpointPtr()

void gem5::Iris::ThreadContext::setHtmCheckpointPtr ( BaseHTMCheckpointPtr  cpt)
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 460 of file thread_context.hh.

References panic.

◆ setIntReg()

void gem5::Iris::ThreadContext::setIntReg ( RegIndex  reg_idx,
RegVal  val 
)
virtual

◆ setIntRegFlat()

void gem5::Iris::ThreadContext::setIntRegFlat ( RegIndex  idx,
uint64_t  val 
)
virtual

Reimplemented in gem5::fastmodel::CortexR52TC, and gem5::fastmodel::CortexA76TC.

Definition at line 826 of file thread_context.cc.

References _instId, call(), flattenedIntIds, panic_if, and gem5::X86ISA::val.

Referenced by setRegFlat().

◆ setMiscReg()

void gem5::Iris::ThreadContext::setMiscReg ( RegIndex  misc_reg,
const RegVal  val 
)
inlineoverridevirtual

◆ setMiscRegNoEffect()

void gem5::Iris::ThreadContext::setMiscRegNoEffect ( RegIndex  misc_reg,
const RegVal  val 
)
overridevirtual

◆ setProcessPtr()

void gem5::Iris::ThreadContext::setProcessPtr ( Process p)
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 236 of file thread_context.hh.

References panic.

◆ setReg() [1/2]

void gem5::Iris::ThreadContext::setReg ( const RegId reg,
const void *  val 
)
overridevirtual

◆ setReg() [2/2]

void gem5::Iris::ThreadContext::setReg ( const RegId reg,
RegVal  val 
)
overridevirtual

Reimplemented from gem5::ThreadContext.

Definition at line 617 of file thread_context.cc.

References gem5::X86ISA::reg, and gem5::X86ISA::val.

◆ setRegFlat() [1/2]

void gem5::Iris::ThreadContext::setRegFlat ( const RegId reg,
const void *  val 
)
overridevirtual

◆ setRegFlat() [2/2]

void gem5::Iris::ThreadContext::setRegFlat ( const RegId reg,
RegVal  val 
)
overridevirtual

Reimplemented from gem5::ThreadContext.

Definition at line 707 of file thread_context.cc.

References gem5::X86ISA::reg, and gem5::X86ISA::val.

◆ setStatus()

void gem5::Iris::ThreadContext::setStatus ( Status  new_status)
overridevirtual

◆ setStCondFailures()

void gem5::Iris::ThreadContext::setStCondFailures ( unsigned  sc_failures)
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 379 of file thread_context.hh.

References panic.

◆ setThreadId()

void gem5::Iris::ThreadContext::setThreadId ( int  id)
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 202 of file thread_context.hh.

References _threadId, and gem5::ArmISA::id.

◆ setVecElem()

virtual void gem5::Iris::ThreadContext::setVecElem ( const RegId reg,
RegVal  val 
)
inlinevirtual

Definition at line 327 of file thread_context.hh.

References panic.

Referenced by setReg().

◆ setVecElemFlat()

virtual void gem5::Iris::ThreadContext::setVecElemFlat ( RegIndex  idx,
RegVal  val 
)
inlinevirtual

Definition at line 424 of file thread_context.hh.

References panic.

Referenced by setRegFlat().

◆ setVecPredReg()

virtual void gem5::Iris::ThreadContext::setVecPredReg ( const RegId reg,
const ArmISA::VecPredRegContainer val 
)
inlinevirtual

Definition at line 333 of file thread_context.hh.

References panic.

Referenced by setReg().

◆ setVecPredRegFlat()

virtual void gem5::Iris::ThreadContext::setVecPredRegFlat ( RegIndex  idx,
const ArmISA::VecPredRegContainer val 
)
inlinevirtual

Definition at line 436 of file thread_context.hh.

References panic.

Referenced by setRegFlat().

◆ setVecReg()

virtual void gem5::Iris::ThreadContext::setVecReg ( const RegId reg,
const ArmISA::VecRegContainer val 
)
inlinevirtual

Definition at line 321 of file thread_context.hh.

References panic.

Referenced by setReg().

◆ setVecRegFlat()

virtual void gem5::Iris::ThreadContext::setVecRegFlat ( RegIndex  idx,
const ArmISA::VecRegContainer val 
)
inlinevirtual

Definition at line 413 of file thread_context.hh.

References panic.

Referenced by setRegFlat().

◆ simulationTimeEvent()

iris::IrisErrorCode gem5::Iris::ThreadContext::simulationTimeEvent ( uint64_t  esId,
const iris::IrisValueMap &  fields,
uint64_t  time,
uint64_t  sInstId,
bool  syncEc,
std::string &  error_message_out 
)
protected

Definition at line 262 of file thread_context.cc.

References call(), and maintainStepping().

◆ socketId()

uint32_t gem5::Iris::ThreadContext::socketId ( ) const
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 199 of file thread_context.hh.

References _cpu.

◆ status()

ThreadContext::Status gem5::Iris::ThreadContext::status ( ) const
overridevirtual

Implements gem5::ThreadContext.

Definition at line 536 of file thread_context.cc.

References _status.

◆ suspend()

void gem5::Iris::ThreadContext::suspend ( )
inlineoverridevirtual

Set the status to Suspended.

Implements gem5::ThreadContext.

Definition at line 244 of file thread_context.hh.

References setStatus(), and gem5::ThreadContext::Suspended.

Referenced by initFromIrisInstance().

◆ takeOverFrom()

void gem5::Iris::ThreadContext::takeOverFrom ( gem5::ThreadContext old_context)
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 248 of file thread_context.hh.

References panic.

◆ threadId()

int gem5::Iris::ThreadContext::threadId ( ) const
inlineoverridevirtual

Implements gem5::ThreadContext.

Definition at line 201 of file thread_context.hh.

References _threadId.

◆ translateAddress() [1/2]

virtual bool gem5::Iris::ThreadContext::translateAddress ( Addr paddr,
Addr  vaddr 
)
pure virtual

◆ translateAddress() [2/2]

bool gem5::Iris::ThreadContext::translateAddress ( Addr paddr,
iris::MemorySpaceId  p_space,
Addr  vaddr,
iris::MemorySpaceId  v_space 
)
protected

Definition at line 461 of file thread_context.cc.

References _instId, noThrow(), panic, translations, gem5::MipsISA::vaddr, and warn.

◆ uninstallBp()

void gem5::Iris::ThreadContext::uninstallBp ( BpInfoIt  it)
protected

Definition at line 190 of file thread_context.cc.

References _instId, and call().

Referenced by delBp().

◆ writeMem()

void gem5::Iris::ThreadContext::writeMem ( iris::MemorySpaceId  space,
Addr  addr,
const void *  p,
size_t  size 
)
protected

Member Data Documentation

◆ _contextId

ContextID gem5::Iris::ThreadContext::_contextId
protected

Definition at line 67 of file thread_context.hh.

Referenced by contextId(), and setContextId().

◆ _cpu

gem5::BaseCPU* gem5::Iris::ThreadContext::_cpu
protected

Definition at line 65 of file thread_context.hh.

Referenced by cpuId(), getCpuPtr(), getSystemPtr(), and socketId().

◆ _instId

iris::InstanceId gem5::Iris::ThreadContext::_instId = iris::IRIS_UINT64_MAX
protected

◆ _irisPath

std::string gem5::Iris::ThreadContext::_irisPath
protected

Definition at line 72 of file thread_context.hh.

Referenced by instanceRegistryChanged().

◆ _isa

gem5::BaseISA* gem5::Iris::ThreadContext::_isa
protected

Definition at line 70 of file thread_context.hh.

Referenced by getIsaPtr().

◆ _mmu

gem5::BaseMMU* gem5::Iris::ThreadContext::_mmu
protected

Definition at line 69 of file thread_context.hh.

Referenced by getMMUPtr().

◆ _status

Status gem5::Iris::ThreadContext::_status = Active
protected

Definition at line 80 of file thread_context.hh.

Referenced by initFromIrisInstance(), setStatus(), and status().

◆ _system

System* gem5::Iris::ThreadContext::_system
protected

Definition at line 68 of file thread_context.hh.

◆ _threadId

int gem5::Iris::ThreadContext::_threadId
protected

Definition at line 66 of file thread_context.hh.

Referenced by setThreadId(), and threadId().

◆ bps

BpInfoMap gem5::Iris::ThreadContext::bps
protected

Definition at line 135 of file thread_context.hh.

Referenced by delBp(), getOrAllocBp(), and initFromIrisInstance().

◆ breakpointEventStreamId

iris::EventStreamId gem5::Iris::ThreadContext::breakpointEventStreamId
protected

Definition at line 165 of file thread_context.hh.

Referenced by initFromIrisInstance(), and ThreadContext().

◆ ccRegIds

ResourceIds gem5::Iris::ThreadContext::ccRegIds
protected

◆ client

iris::IrisInstance gem5::Iris::ThreadContext::client
mutableprotected

Definition at line 168 of file thread_context.hh.

Referenced by call(), initFromIrisInstance(), noThrow(), ThreadContext(), and ~ThreadContext().

◆ comInstEventQueue

EventQueue gem5::Iris::ThreadContext::comInstEventQueue
protected

◆ enableAfterPseudoEvent

Event* gem5::Iris::ThreadContext::enableAfterPseudoEvent
protected

Definition at line 81 of file thread_context.hh.

Referenced by semihostingEvent(), setStatus(), ThreadContext(), and ~ThreadContext().

◆ flattenedIntIds

ResourceIds gem5::Iris::ThreadContext::flattenedIntIds
protected

◆ icountRscId

iris::ResourceId gem5::Iris::ThreadContext::icountRscId
protected

Definition at line 99 of file thread_context.hh.

◆ initEventStreamId

iris::EventStreamId gem5::Iris::ThreadContext::initEventStreamId
protected

Definition at line 163 of file thread_context.hh.

Referenced by ThreadContext(), and ~ThreadContext().

◆ intReg32Ids

ResourceIds gem5::Iris::ThreadContext::intReg32Ids
protected

◆ intReg64Ids

ResourceIds gem5::Iris::ThreadContext::intReg64Ids
protected

◆ memorySpaceIds

MemorySpaceMap gem5::Iris::ThreadContext::memorySpaceIds
protected

Definition at line 106 of file thread_context.hh.

Referenced by getMemorySpaceId(), and initFromIrisInstance().

◆ memorySpaces

std::vector<iris::MemorySpaceInfo> gem5::Iris::ThreadContext::memorySpaces
protected

Definition at line 104 of file thread_context.hh.

Referenced by initFromIrisInstance().

◆ miscRegIds

ResourceIds gem5::Iris::ThreadContext::miscRegIds
protected

◆ pc

ArmISA::PCState gem5::Iris::ThreadContext::pc
mutableprotected

Definition at line 172 of file thread_context.hh.

Referenced by breakpointHit(), getOrAllocBp(), installBp(), and pcState().

◆ pcRscId

iris::ResourceId gem5::Iris::ThreadContext::pcRscId = iris::IRIS_UINT64_MAX
protected

◆ regEventStreamId

iris::EventStreamId gem5::Iris::ThreadContext::regEventStreamId
protected

Definition at line 162 of file thread_context.hh.

Referenced by ThreadContext(), and ~ThreadContext().

◆ semihostingEventStreamId

iris::EventStreamId gem5::Iris::ThreadContext::semihostingEventStreamId
protected

Definition at line 166 of file thread_context.hh.

Referenced by initFromIrisInstance(), and ThreadContext().

◆ timeEventStreamId

iris::EventStreamId gem5::Iris::ThreadContext::timeEventStreamId
protected

Definition at line 164 of file thread_context.hh.

Referenced by ThreadContext(), and ~ThreadContext().

◆ translations

std::vector<iris::MemorySupportedAddressTranslationResult> gem5::Iris::ThreadContext::translations
protected

Definition at line 105 of file thread_context.hh.

Referenced by initFromIrisInstance(), and translateAddress().

◆ vecPredRegIds

ResourceIds gem5::Iris::ThreadContext::vecPredRegIds
protected

Definition at line 102 of file thread_context.hh.

Referenced by readVecPredReg().

◆ vecPredRegs

std::vector<ArmISA::VecPredRegContainer> gem5::Iris::ThreadContext::vecPredRegs
mutableprotected

Definition at line 78 of file thread_context.hh.

Referenced by readVecPredReg().

◆ vecRegIds

ResourceIds gem5::Iris::ThreadContext::vecRegIds
protected

◆ vecRegs

std::vector<ArmISA::VecRegContainer> gem5::Iris::ThreadContext::vecRegs
mutableprotected

Definition at line 77 of file thread_context.hh.

Referenced by readVecReg().


The documentation for this class was generated from the following files:

Generated on Thu Jul 28 2022 13:34:07 for gem5 by doxygen 1.8.17