gem5::UFSHostDevice::HCIMem Struct Reference

Host Controller Interface This is a set of registers that allow the driver to control the transactions to the flash devices. More...

Public Attributes
uint32_t	HCCAP
	Specify the host capabilities.
uint32_t	HCversion
uint32_t	HCHCDDID
uint32_t	HCHCPMID
uint32_t	ORInterruptStatus
	Operation and runtime registers.
uint32_t	ORInterruptEnable
uint32_t	ORHostControllerStatus
uint32_t	ORHostControllerEnable
uint32_t	ORUECPA
uint32_t	ORUECDL
uint32_t	ORUECN
uint32_t	ORUECT
uint32_t	ORUECDME
uint32_t	ORUTRIACR
uint32_t	vendorSpecific
	vendor specific register
uint32_t	TRUTRLBA
	Transfer control registers.
uint32_t	TRUTRLBAU
uint32_t	TRUTRLDBR
uint32_t	TRUTRLCLR
uint32_t	TRUTRLRSR
uint32_t	TMUTMRLBA
	Task control registers.
uint32_t	TMUTMRLBAU
uint32_t	TMUTMRLDBR
uint32_t	TMUTMRLCLR
uint32_t	TMUTMRLRSR
uint32_t	CMDUICCMDR
	Command registers.
uint32_t	CMDUCMDARG1
uint32_t	CMDUCMDARG2
uint32_t	CMDUCMDARG3

Detailed Description

Host Controller Interface This is a set of registers that allow the driver to control the transactions to the flash devices.

As defined in: http://www.jedec.org/standards-documents/results/jesd223

Definition at line 191 of file ufs_device.hh.

Member Data Documentation

CMDUCMDARG1

uint32_t gem5::UFSHostDevice::HCIMem::CMDUCMDARG1

Definition at line 242 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

CMDUCMDARG2

uint32_t gem5::UFSHostDevice::HCIMem::CMDUCMDARG2

Definition at line 243 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

CMDUCMDARG3

uint32_t gem5::UFSHostDevice::HCIMem::CMDUCMDARG3

Definition at line 244 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

CMDUICCMDR

uint32_t gem5::UFSHostDevice::HCIMem::CMDUICCMDR

Command registers.

Definition at line 241 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::commandHandler(), gem5::UFSHostDevice::read(), gem5::UFSHostDevice::requestHandler(), gem5::UFSHostDevice::setValues(), and gem5::UFSHostDevice::write().

HCCAP

uint32_t gem5::UFSHostDevice::HCIMem::HCCAP

Specify the host capabilities.

Definition at line 196 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::setValues().

HCHCDDID

uint32_t gem5::UFSHostDevice::HCIMem::HCHCDDID

Definition at line 198 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::setValues().

HCHCPMID

uint32_t gem5::UFSHostDevice::HCIMem::HCHCPMID

Definition at line 199 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::setValues().

HCversion

uint32_t gem5::UFSHostDevice::HCIMem::HCversion

Definition at line 197 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::setValues().

ORHostControllerEnable

uint32_t gem5::UFSHostDevice::HCIMem::ORHostControllerEnable

Definition at line 207 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

ORHostControllerStatus

uint32_t gem5::UFSHostDevice::HCIMem::ORHostControllerStatus

Definition at line 206 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::commandHandler(), gem5::UFSHostDevice::read(), gem5::UFSHostDevice::setValues(), and gem5::UFSHostDevice::write().

ORInterruptEnable

uint32_t gem5::UFSHostDevice::HCIMem::ORInterruptEnable

Definition at line 205 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

ORInterruptStatus

uint32_t gem5::UFSHostDevice::HCIMem::ORInterruptStatus

Operation and runtime registers.

Definition at line 204 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), gem5::UFSHostDevice::readDone(), gem5::UFSHostDevice::requestHandler(), and gem5::UFSHostDevice::taskHandler().

ORUECDL

uint32_t gem5::UFSHostDevice::HCIMem::ORUECDL

Definition at line 209 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

ORUECDME

uint32_t gem5::UFSHostDevice::HCIMem::ORUECDME

Definition at line 212 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

ORUECN

uint32_t gem5::UFSHostDevice::HCIMem::ORUECN

Definition at line 210 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

ORUECPA

uint32_t gem5::UFSHostDevice::HCIMem::ORUECPA

Definition at line 208 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

ORUECT

uint32_t gem5::UFSHostDevice::HCIMem::ORUECT

Definition at line 211 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

ORUTRIACR

uint32_t gem5::UFSHostDevice::HCIMem::ORUTRIACR

Definition at line 213 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

TMUTMRLBA

uint32_t gem5::UFSHostDevice::HCIMem::TMUTMRLBA

Task control registers.

Definition at line 232 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), gem5::UFSHostDevice::requestHandler(), gem5::UFSHostDevice::setValues(), and gem5::UFSHostDevice::write().

TMUTMRLBAU

uint32_t gem5::UFSHostDevice::HCIMem::TMUTMRLBAU

Definition at line 233 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), gem5::UFSHostDevice::requestHandler(), gem5::UFSHostDevice::setValues(), and gem5::UFSHostDevice::write().

TMUTMRLCLR

uint32_t gem5::UFSHostDevice::HCIMem::TMUTMRLCLR

Definition at line 235 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

TMUTMRLDBR

uint32_t gem5::UFSHostDevice::HCIMem::TMUTMRLDBR

Definition at line 234 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), gem5::UFSHostDevice::requestHandler(), gem5::UFSHostDevice::setValues(), gem5::UFSHostDevice::taskHandler(), and gem5::UFSHostDevice::write().

TMUTMRLRSR

uint32_t gem5::UFSHostDevice::HCIMem::TMUTMRLRSR

Definition at line 236 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

TRUTRLBA

uint32_t gem5::UFSHostDevice::HCIMem::TRUTRLBA

Transfer control registers.

Definition at line 223 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), gem5::UFSHostDevice::requestHandler(), gem5::UFSHostDevice::setValues(), and gem5::UFSHostDevice::write().

TRUTRLBAU

uint32_t gem5::UFSHostDevice::HCIMem::TRUTRLBAU

Definition at line 224 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), gem5::UFSHostDevice::requestHandler(), gem5::UFSHostDevice::setValues(), and gem5::UFSHostDevice::write().

TRUTRLCLR

uint32_t gem5::UFSHostDevice::HCIMem::TRUTRLCLR

Definition at line 226 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

TRUTRLDBR

uint32_t gem5::UFSHostDevice::HCIMem::TRUTRLDBR

Definition at line 225 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::checkDrain(), gem5::UFSHostDevice::clearInterrupt(), gem5::UFSHostDevice::drain(), gem5::UFSHostDevice::finalUTP(), gem5::UFSHostDevice::generateInterrupt(), gem5::UFSHostDevice::read(), gem5::UFSHostDevice::requestHandler(), gem5::UFSHostDevice::SCSIResume(), gem5::UFSHostDevice::setValues(), gem5::UFSHostDevice::transferDone(), and gem5::UFSHostDevice::write().

TRUTRLRSR

uint32_t gem5::UFSHostDevice::HCIMem::TRUTRLRSR

Definition at line 227 of file ufs_device.hh.

Referenced by gem5::UFSHostDevice::read(), and gem5::UFSHostDevice::write().

vendorSpecific

uint32_t gem5::UFSHostDevice::HCIMem::vendorSpecific

vendor specific register

Definition at line 218 of file ufs_device.hh.

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The documentation for this struct was generated from the following file:

• dev/arm/ufs_device.hh