gem5  v22.1.0.0
display.h
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3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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20 /*****************************************************************************
21 
22  display.h --
23 
24  Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
25 
26  *****************************************************************************/
27 
28 /*****************************************************************************
29 
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
32 
33  Name, Affiliation, Date:
34  Description of Modification:
35 
36  *****************************************************************************/
37 
38 #include "define.h"
39 
40 
41 /******************************************************************************/
42 /*************************** Output Display Function **********************/
43 /******************************************************************************/
44 
45 SC_MODULE( DISPLAY )
46 {
47  SC_HAS_PROCESS( DISPLAY );
48 
49  /*** Input and Output Ports ***/
50  const sc_signal<bool>& ready; // Input
51  const signal_bool_vector8& data; // Input
52  const signal_bool_vector4& sum; // Input
53 
54  /*** Constructor ***/
55  DISPLAY ( sc_module_name NAME,
56  const sc_signal<bool>& READY,
57  const signal_bool_vector8& DATA,
58  const signal_bool_vector4& SUM )
59 
60  : ready (READY),
61  data (DATA), // 8 bits
62  sum (SUM)
63 
64  {
65  SC_METHOD( entry );
66  sensitive << ready;
67  sensitive << data;
68  sensitive << sum;
69  }
70 
71  /*** Call to Process Functionality ***/
72  void entry();
73 
74 };
75 
76 void
77 DISPLAY::entry()
78 {
79 // DISPLAY NUMBER OF 1'S IN DATA AT NEGEDGE ready
80 
81  if( ready.posedge() ) {
82  cout << "Sum of "
83  << data.read()
84  << " is " << sum.read().to_uint()
85  << endl;
86  }
87 }
SC_MODULE(display)
Definition: display.h:40
const char data[]
Bitfield< 18 > sum
Definition: misc.hh:560
#define SC_METHOD(name)
Definition: sc_module.hh:303
#define SC_HAS_PROCESS(name)
Definition: sc_module.hh:301
sc_signal< sc_bv< 8 > > signal_bool_vector8
Definition: common.h:43
sc_signal< bool_vector4 > signal_bool_vector4
Definition: common.h:46

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