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isa_traits.hh
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39 
40 #ifndef __ARCH_X86_ISATRAITS_HH__
41 #define __ARCH_X86_ISATRAITS_HH__
42 
43 #include "arch/x86/types.hh"
44 #include "arch/x86/x86_traits.hh"
45 #include "base/compiler.hh"
46 #include "base/types.hh"
47 
48 namespace X86ISA
49 {
50  const ByteOrder GuestByteOrder = LittleEndianByteOrder;
51 
52  const Addr PageShift = 12;
53  const Addr PageBytes = ULL(1) << PageShift;
54 
55  // Memory accesses can be unaligned
56  const bool HasUnalignedMemAcc = true;
57 
58  const bool CurThreadInfoImplemented = false;
59  const int CurThreadInfoReg = -1;
60 }
61 
62 #endif // __ARCH_X86_ISATRAITS_HH__
X86ISA::GuestByteOrder
const ByteOrder GuestByteOrder
Definition: isa_traits.hh:50
X86ISA::CurThreadInfoReg
const int CurThreadInfoReg
Definition: isa_traits.hh:59
X86ISA::PageBytes
const Addr PageBytes
Definition: isa_traits.hh:53
x86_traits.hh
ByteOrder
ByteOrder
Definition: types.hh:247
types.hh
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,16,32,64}_t.
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
ULL
#define ULL(N)
uint64_t constant
Definition: types.hh:50
X86ISA::CurThreadInfoImplemented
const bool CurThreadInfoImplemented
Definition: isa_traits.hh:58
X86ISA::PageShift
const Addr PageShift
Definition: isa_traits.hh:52
X86ISA
This is exposed globally, independent of the ISA.
Definition: acpi.hh:57
X86ISA::HasUnalignedMemAcc
const bool HasUnalignedMemAcc
Definition: isa_traits.hh:56
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