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GarnetSyntheticTraffic.cc
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1 /*
2  * Copyright (c) 2016 Georgia Institute of Technology
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28 
30 
31 #include <cmath>
32 #include <iomanip>
33 #include <set>
34 #include <string>
35 #include <vector>
36 
37 #include "base/logging.hh"
38 #include "base/random.hh"
39 #include "base/statistics.hh"
40 #include "debug/GarnetSyntheticTraffic.hh"
41 #include "mem/packet.hh"
42 #include "mem/port.hh"
43 #include "mem/request.hh"
44 #include "sim/sim_events.hh"
45 #include "sim/stats.hh"
46 #include "sim/system.hh"
47 
48 using namespace std;
49 
51 
52 bool
54 {
55  tester->completeRequest(pkt);
56  return true;
57 }
58 
59 void
61 {
62  tester->doRetry();
63 }
64 
65 void
67 {
68  if (!cachePort.sendTimingReq(pkt)) {
69  retryPkt = pkt; // RubyPort will retry sending
70  }
71  numPacketsSent++;
72 }
73 
75  : ClockedObject(p),
76  tickEvent([this]{ tick(); }, "GarnetSyntheticTraffic tick",
77  false, Event::CPU_Tick_Pri),
78  cachePort("GarnetSyntheticTraffic", this),
79  retryPkt(NULL),
80  size(p->memory_size),
81  blockSizeBits(p->block_offset),
82  numDestinations(p->num_dest),
83  simCycles(p->sim_cycles),
84  numPacketsMax(p->num_packets_max),
85  numPacketsSent(0),
86  singleSender(p->single_sender),
87  singleDest(p->single_dest),
88  trafficType(p->traffic_type),
89  injRate(p->inj_rate),
90  injVnet(p->inj_vnet),
91  precision(p->precision),
92  responseLimit(p->response_limit),
93  masterId(p->system->getMasterId(this))
94 {
95  // set up counters
96  noResponseCycles = 0;
97  schedule(tickEvent, 0);
98 
100  if (trafficStringToEnum.count(trafficType) == 0) {
101  fatal("Unknown Traffic Type: %s!\n", traffic);
102  }
104 
105  id = TESTER_NETWORK++;
106  DPRINTF(GarnetSyntheticTraffic,"Config Created: Name = %s , and id = %d\n",
107  name(), id);
108 }
109 
110 Port &
111 GarnetSyntheticTraffic::getPort(const std::string &if_name, PortID idx)
112 {
113  if (if_name == "test")
114  return cachePort;
115  else
116  return ClockedObject::getPort(if_name, idx);
117 }
118 
119 void
121 {
122  numPacketsSent = 0;
123 }
124 
125 
126 void
128 {
130  "Completed injection of %s packet for address %x\n",
131  pkt->isWrite() ? "write" : "read\n",
132  pkt->req->getPaddr());
133 
134  assert(pkt->isResponse());
135  noResponseCycles = 0;
136  delete pkt;
137 }
138 
139 
140 void
142 {
143  if (++noResponseCycles >= responseLimit) {
144  fatal("%s deadlocked at cycle %d\n", name(), curTick());
145  }
146 
147  // make new request based on injection rate
148  // (injection rate's range depends on precision)
149  // - generate a random number between 0 and 10^precision
150  // - send pkt if this number is < injRate*(10^precision)
151  bool sendAllowedThisCycle;
152  double injRange = pow((double) 10, (double) precision);
153  unsigned trySending = random_mt.random<unsigned>(0, (int) injRange);
154  if (trySending < injRate*injRange)
155  sendAllowedThisCycle = true;
156  else
157  sendAllowedThisCycle = false;
158 
159  // always generatePkt unless fixedPkts or singleSender is enabled
160  if (sendAllowedThisCycle) {
161  bool senderEnable = true;
162 
164  senderEnable = false;
165 
166  if (singleSender >= 0 && id != singleSender)
167  senderEnable = false;
168 
169  if (senderEnable)
170  generatePkt();
171  }
172 
173  // Schedule wakeup
174  if (curTick() >= simCycles)
175  exitSimLoop("Network Tester completed simCycles");
176  else {
177  if (!tickEvent.scheduled())
179  }
180 }
181 
182 void
184 {
185  int num_destinations = numDestinations;
186  int radix = (int) sqrt(num_destinations);
187  unsigned destination = id;
188  int dest_x = -1;
189  int dest_y = -1;
190  int source = id;
191  int src_x = id%radix;
192  int src_y = id/radix;
193 
194  if (singleDest >= 0)
195  {
196  destination = singleDest;
197  } else if (traffic == UNIFORM_RANDOM_) {
198  destination = random_mt.random<unsigned>(0, num_destinations - 1);
199  } else if (traffic == BIT_COMPLEMENT_) {
200  dest_x = radix - src_x - 1;
201  dest_y = radix - src_y - 1;
202  destination = dest_y*radix + dest_x;
203  } else if (traffic == BIT_REVERSE_) {
204  unsigned int straight = source;
205  unsigned int reverse = source & 1; // LSB
206 
207  int num_bits = (int) log2(num_destinations);
208 
209  for (int i = 1; i < num_bits; i++)
210  {
211  reverse <<= 1;
212  straight >>= 1;
213  reverse |= (straight & 1); // LSB
214  }
215  destination = reverse;
216  } else if (traffic == BIT_ROTATION_) {
217  if (source%2 == 0)
218  destination = source/2;
219  else // (source%2 == 1)
220  destination = ((source/2) + (num_destinations/2));
221  } else if (traffic == NEIGHBOR_) {
222  dest_x = (src_x + 1) % radix;
223  dest_y = src_y;
224  destination = dest_y*radix + dest_x;
225  } else if (traffic == SHUFFLE_) {
226  if (source < num_destinations/2)
227  destination = source*2;
228  else
229  destination = (source*2 - num_destinations + 1);
230  } else if (traffic == TRANSPOSE_) {
231  dest_x = src_y;
232  dest_y = src_x;
233  destination = dest_y*radix + dest_x;
234  } else if (traffic == TORNADO_) {
235  dest_x = (src_x + (int) ceil(radix/2) - 1) % radix;
236  dest_y = src_y;
237  destination = dest_y*radix + dest_x;
238  }
239  else {
240  fatal("Unknown Traffic Type: %s!\n", traffic);
241  }
242 
243  // The source of the packets is a cache.
244  // The destination of the packets is a directory.
245  // The destination bits are embedded in the address after byte-offset.
246  Addr paddr = destination;
247  paddr <<= blockSizeBits;
248  unsigned access_size = 1; // Does not affect Ruby simulation
249 
250  // Modeling different coherence msg types over different msg classes.
251  //
252  // GarnetSyntheticTraffic assumes the Garnet_standalone coherence protocol
253  // which models three message classes/virtual networks.
254  // These are: request, forward, response.
255  // requests and forwards are "control" packets (typically 8 bytes),
256  // while responses are "data" packets (typically 72 bytes).
257  //
258  // Life of a packet from the tester into the network:
259  // (1) This function generatePkt() generates packets of one of the
260  // following 3 types (randomly) : ReadReq, INST_FETCH, WriteReq
261  // (2) mem/ruby/system/RubyPort.cc converts these to RubyRequestType_LD,
262  // RubyRequestType_IFETCH, RubyRequestType_ST respectively
263  // (3) mem/ruby/system/Sequencer.cc sends these to the cache controllers
264  // in the coherence protocol.
265  // (4) Network_test-cache.sm tags RubyRequestType:LD,
266  // RubyRequestType:IFETCH and RubyRequestType:ST as
267  // Request, Forward, and Response events respectively;
268  // and injects them into virtual networks 0, 1 and 2 respectively.
269  // It immediately calls back the sequencer.
270  // (5) The packet traverses the network (simple/garnet) and reaches its
271  // destination (Directory), and network stats are updated.
272  // (6) Network_test-dir.sm simply drops the packet.
273  //
274  MemCmd::Command requestType;
275 
276  RequestPtr req = nullptr;
277  Request::Flags flags;
278 
279  // Inject in specific Vnet
280  // Vnet 0 and 1 are for control packets (1-flit)
281  // Vnet 2 is for data packets (5-flit)
282  int injReqType = injVnet;
283 
284  if (injReqType < 0 || injReqType > 2)
285  {
286  // randomly inject in any vnet
287  injReqType = random_mt.random(0, 2);
288  }
289 
290  if (injReqType == 0) {
291  // generate packet for virtual network 0
292  requestType = MemCmd::ReadReq;
293  req = std::make_shared<Request>(paddr, access_size, flags, masterId);
294  } else if (injReqType == 1) {
295  // generate packet for virtual network 1
296  requestType = MemCmd::ReadReq;
297  flags.set(Request::INST_FETCH);
298  req = std::make_shared<Request>(
299  0x0, access_size, flags, masterId, 0x0, 0);
300  req->setPaddr(paddr);
301  } else { // if (injReqType == 2)
302  // generate packet for virtual network 2
303  requestType = MemCmd::WriteReq;
304  req = std::make_shared<Request>(paddr, access_size, flags, masterId);
305  }
306 
307  req->setContext(id);
308 
309  //No need to do functional simulation
310  //We just do timing simulation of the network
311 
313  "Generated packet with destination %d, embedded in address %x\n",
314  destination, req->getPaddr());
315 
316  PacketPtr pkt = new Packet(req, requestType);
317  pkt->dataDynamic(new uint8_t[req->getSize()]);
318  pkt->senderState = NULL;
319 
320  sendPkt(pkt);
321 }
322 
323 void
325 {
326  trafficStringToEnum["bit_complement"] = BIT_COMPLEMENT_;
327  trafficStringToEnum["bit_reverse"] = BIT_REVERSE_;
328  trafficStringToEnum["bit_rotation"] = BIT_ROTATION_;
329  trafficStringToEnum["neighbor"] = NEIGHBOR_;
330  trafficStringToEnum["shuffle"] = SHUFFLE_;
331  trafficStringToEnum["tornado"] = TORNADO_;
332  trafficStringToEnum["transpose"] = TRANSPOSE_;
333  trafficStringToEnum["uniform_random"] = UNIFORM_RANDOM_;
334 }
335 
336 void
338 {
340  retryPkt = NULL;
341  }
342 }
343 
344 void
346 {
347  cachePort.printAddr(a);
348 }
349 
350 
352 GarnetSyntheticTrafficParams::create()
353 {
354  return new GarnetSyntheticTraffic(this);
355 }
#define DPRINTF(x,...)
Definition: trace.hh:222
Ports are used to interface objects to each other.
Definition: port.hh:56
Cycles is a wrapper class for representing cycle counts, i.e.
Definition: types.hh:81
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:171
Bitfield< 7 > i
int TESTER_NETWORK
Declaration of a request, the overall memory request consisting of the parts of the request that are ...
std::shared_ptr< Request > RequestPtr
Definition: request.hh:81
Bitfield< 8 > a
void completeRequest(PacketPtr pkt)
GarnetSyntheticTraffic(const Params *p)
Overload hash function for BasicBlockRange type.
Definition: vec_reg.hh:587
bool sendTimingReq(PacketPtr pkt)
Attempt to send a timing request to the slave port by calling its corresponding receive function...
Definition: port.hh:441
bool isWrite() const
Definition: packet.hh:523
Declaration of Statistics objects.
std::enable_if< std::is_integral< T >::value, T >::type random()
Use the SFINAE idiom to choose an implementation based on whether the type is integral or floating po...
Definition: random.hh:79
const sc_lv_base reverse(const sc_proxy< X > &x)
Definition: sc_lv_base.hh:683
RequestPtr req
A pointer to the original request.
Definition: packet.hh:321
Tick curTick()
The current simulated tick.
Definition: core.hh:44
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
Definition: sim_object.cc:123
virtual bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
void printAddr(Addr a)
Print state of address in memory system via PrintReq (for debugging).
bool isResponse() const
Definition: packet.hh:526
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
static const Priority CPU_Tick_Pri
CPU ticks must come after other associated CPU events (such as writebacks).
Definition: eventq.hh:199
The request was an instruction fetch.
Definition: request.hh:103
void schedule(Event &event, Tick when)
Definition: eventq.hh:998
Port Object Declaration.
GarnetSyntheticTrafficParams Params
std::map< std::string, TrafficType > trafficStringToEnum
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:140
void printAddr(Addr a)
Inject a PrintReq for the given address to print the state of that address throughout the memory syst...
Definition: port.cc:95
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:249
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
bool scheduled() const
Determine if the current event is scheduled.
Definition: eventq.hh:460
virtual const std::string name() const
Definition: sim_object.hh:128
void exitSimLoop(const std::string &message, int exit_code, Tick when, Tick repeat, bool serialize)
Schedule an event to exit the simulation loop (returning to Python) at the end of the current cycle (...
Definition: sim_events.cc:88
Declaration of the Packet class.
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Random random_mt
Definition: random.cc:96
virtual void recvReqRetry()
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:235
Command
List of all commands associated with a packet.
Definition: packet.hh:78
Bitfield< 0 > p
void set(Type flags)
Definition: flags.hh:68
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
ProbePointArg< PacketInfo > Packet
Packet probe point.
Definition: mem.hh:103
EventFunctionWrapper tickEvent

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