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copy_engine.hh
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40 
41 /* @file
42  * Device model for Intel's I/O Acceleration Technology (I/OAT).
43  * A DMA asyncronous copy engine
44  */
45 
46 #ifndef __DEV_PCI_COPY_ENGINE_HH__
47 #define __DEV_PCI_COPY_ENGINE_HH__
48 
49 #include <vector>
50 
51 #include "base/cp_annotate.hh"
52 #include "base/statistics.hh"
54 #include "dev/pci/device.hh"
55 #include "params/CopyEngine.hh"
56 #include "sim/drain.hh"
57 #include "sim/eventq.hh"
58 
59 class CopyEngine : public PciDevice
60 {
61  class CopyEngineChannel : public Drainable, public Serializable
62  {
63  private:
67  int channelId;
69  uint8_t *copyBuffer;
70 
71  bool busy;
72  bool underReset;
76 
79 
81 
82  enum ChannelState {
89  };
90 
92 
93  public:
94  CopyEngineChannel(CopyEngine *_ce, int cid);
95  virtual ~CopyEngineChannel();
96  Port &getPort();
97 
98  std::string name() { assert(ce); return ce->name() + csprintf("-chan%d", channelId); }
99  virtual Tick read(PacketPtr pkt)
100  { panic("CopyEngineChannel has no I/O access\n");}
101  virtual Tick write(PacketPtr pkt)
102  { panic("CopyEngineChannel has no I/O access\n"); }
103 
104  void channelRead(PacketPtr pkt, Addr daddr, int size);
105  void channelWrite(PacketPtr pkt, Addr daddr, int size);
106 
107  DrainState drain() override;
108  void drainResume() override;
109 
110  void serialize(CheckpointOut &cp) const override;
111  void unserialize(CheckpointIn &cp) override;
112 
113  private:
114  void fetchDescriptor(Addr address);
115  void fetchDescComplete();
117 
118  void fetchNextAddr(Addr address);
119  void fetchAddrComplete();
121 
122  void readCopyBytes();
123  void readCopyBytesComplete();
125 
126  void writeCopyBytes();
127  void writeCopyBytesComplete();
129 
130  void writeCompletionStatus();
131  void writeStatusComplete();
133 
134 
135  void continueProcessing();
136  void recvCommand();
137  bool inDrain();
138  void restartStateMachine();
139  inline void anBegin(const char *s)
140  {
142  channelId, "CopyEngine", s);
143  }
144 
145  inline void anWait()
146  {
147  CPA::cpa()->hwWe(CPA::FL_NONE, ce->sys,
148  channelId, "CopyEngine", "DMAUnusedDescQ", channelId);
149  }
150 
151  inline void anDq()
152  {
153  CPA::cpa()->hwDq(CPA::FL_NONE, ce->sys,
154  channelId, "CopyEngine", "DMAUnusedDescQ", channelId);
155  }
156 
157  inline void anPq()
158  {
159  CPA::cpa()->hwDq(CPA::FL_NONE, ce->sys,
160  channelId, "CopyEngine", "DMAUnusedDescQ", channelId);
161  }
162 
163  inline void anQ(const char * s, uint64_t id, int size = 1)
164  {
165  CPA::cpa()->hwQ(CPA::FL_NONE, ce->sys, channelId,
166  "CopyEngine", s, id, NULL, size);
167  }
168 
169  };
170 
171  private:
172 
175 
176  // device registers
178 
179  // Array of channels each one with regs/dma port/etc
181 
182  public:
183  typedef CopyEngineParams Params;
184  const Params *
185  params() const
186  {
187  return dynamic_cast<const Params *>(_params);
188  }
189  CopyEngine(const Params *params);
190  ~CopyEngine();
191 
192  void regStats() override;
193 
194  Port &getPort(const std::string &if_name,
195  PortID idx = InvalidPortID) override;
196 
197  Tick read(PacketPtr pkt) override;
198  Tick write(PacketPtr pkt) override;
199 
200  void serialize(CheckpointOut &cp) const override;
201  void unserialize(CheckpointIn &cp) override;
202 };
203 
204 #endif //__DEV_PCI_COPY_ENGINE_HH__
205 
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:163
EventFunctionWrapper fetchCompleteEvent
Definition: copy_engine.hh:116
void anBegin(const char *s)
Definition: copy_engine.hh:139
Ports are used to interface objects to each other.
Definition: port.hh:56
void hwDq(flags f, System *sys, uint64_t frame, std::string sm, std::string q, uint64_t qid, System *q_sys=NULL, int32_t count=1)
Definition: cp_annotate.hh:119
EventFunctionWrapper statusCompleteEvent
Definition: copy_engine.hh:132
const PortID InvalidPortID
Definition: types.hh:236
void fetchDescriptor(Addr address)
Definition: copy_engine.cc:450
PCI device, base implementation is only config space.
Definition: device.hh:66
void hwQ(flags f, System *sys, uint64_t frame, std::string sm, std::string q, uint64_t qid, System *q_sys=NULL, int32_t count=1)
Definition: cp_annotate.hh:116
void channelWrite(PacketPtr pkt, Addr daddr, int size)
Definition: copy_engine.cc:368
CopyEngineParams Params
Definition: copy_engine.hh:183
void anQ(const char *s, uint64_t id, int size=1)
Definition: copy_engine.hh:163
EventFunctionWrapper readCompleteEvent
Definition: copy_engine.hh:124
A vector of scalar stats.
Definition: statistics.hh:2547
virtual Tick read(PacketPtr pkt)
Definition: copy_engine.hh:99
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: copy_engine.cc:683
void hwWe(flags f, System *sys, uint64_t frame, std::string sm, std::string q, uint64_t qid, System *q_sys=NULL, int32_t count=1)
Definition: cp_annotate.hh:131
Definition: cprintf.cc:40
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: copy_engine.cc:700
Declaration of Statistics objects.
DrainState
Object drain/handover states.
Definition: drain.hh:71
STL vector class.
Definition: stl.hh:37
void hwBegin(flags f, System *sys, uint64_t frame, std::string sm, std::string st)
Definition: cp_annotate.hh:114
Interface for objects that might require draining before checkpointing.
Definition: drain.hh:239
virtual Tick write(PacketPtr pkt)
Definition: copy_engine.hh:101
Stats::Vector copiesProcessed
Definition: copy_engine.hh:174
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:158
Bitfield< 4 > s
static CPA * cpa()
Definition: cp_annotate.hh:82
uint64_t Tick
Tick count type.
Definition: types.hh:61
CopyEngineReg::Regs regs
Definition: copy_engine.hh:177
void channelRead(PacketPtr pkt, Addr daddr, int size)
Definition: copy_engine.cc:240
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:140
std::vector< CopyEngineChannel * > chan
Definition: copy_engine.hh:180
System * sys
Definition: io_device.hh:102
CopyEngineReg::ChanRegs cr
Definition: copy_engine.hh:66
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:249
Basic support for object serialization.
Definition: serialize.hh:166
CopyEngineReg::DmaDesc * curDmaDesc
Definition: copy_engine.hh:68
void regStats() override
Callback to set stat parameters.
Definition: copy_engine.cc:430
CopyEngineChannel(CopyEngine *_ce, int cid)
Definition: copy_engine.cc:79
void drainResume() override
Resume execution after a successful drain.
Definition: copy_engine.cc:745
virtual const std::string name() const
Definition: sim_object.hh:128
EventFunctionWrapper writeCompleteEvent
Definition: copy_engine.hh:128
std::ostream CheckpointOut
Definition: serialize.hh:63
const SimObjectParams * _params
Cached copy of the object parameters.
Definition: sim_object.hh:110
Stats::Vector bytesCopied
Definition: copy_engine.hh:173
EventFunctionWrapper addrCompleteEvent
Definition: copy_engine.hh:120
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:235
CopyEngine(const Params *params)
Definition: copy_engine.cc:61
DrainState drain() override
Notify an object that it needs to drain its state.
Definition: copy_engine.cc:654
const Params * params() const
Definition: copy_engine.hh:185
void fetchNextAddr(Addr address)
Definition: copy_engine.cc:611

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