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decode_cache.cc
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28 
30 
31 #include "arch/decoder.hh"
32 #include "arch/types.hh"
33 #include "config/the_isa.hh"
34 #include "cpu/static_inst.hh"
35 
36 namespace GenericISA
37 {
38 
41  TheISA::ExtMachInst mach_inst, Addr addr)
42 {
43  StaticInstPtr &si = decodePages.lookup(addr);
44  if (si && (si->machInst == mach_inst))
45  return si;
46 
47  auto iter = instMap.find(mach_inst);
48  if (iter != instMap.end()) {
49  si = iter->second;
50  return si;
51  }
52 
53  si = decoder->decodeInst(mach_inst);
54  instMap[mach_inst] = si;
55  return si;
56 }
57 
58 } // namespace GenericISA
uint64_t ExtMachInst
Definition: types.hh:39
DecodeCache::AddrMap< StaticInstPtr > decodePages
Definition: decode_cache.hh:49
ip6_addr_t addr
Definition: inet.hh:330
Bitfield< 15, 0 > si
Definition: types.hh:53
const ExtMachInst machInst
The binary machine instruction.
Definition: static_inst.hh:231
StaticInstPtr decode(TheISA::Decoder *const decoder, TheISA::ExtMachInst mach_inst, Addr addr)
Decode a machine instruction.
Definition: decode_cache.cc:40
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:140
DecodeCache::InstMap< TheISA::ExtMachInst > instMap
Definition: decode_cache.hh:48
output decoder
Definition: nop.cc:61

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