36 #include "debug/GPUMem.hh" 44 n_reg(0), useContinuation(false),
45 statusBitVector(0), _staticInst(static_inst), _seqNum(instSeqNum)
145 Enums::StorageClassType
155 DPRINTF(GPUMem,
"CU%d: WF[%d][%d]: mempacket status bitvector=%#x\n",
512 assert(number_pages_touched);
521 .insert(ComputeUnit::pageDataStruct::value_type(it.first,
522 std::make_pair(1, it.second)));
526 ret.first->second.first++;
527 ret.first->second.second += it.second;
bool isSystemCoherent() const
bool isWorkgroupScope() const
virtual void completeAcc(GPUDynInstPtr gpuDynInst)
bool isGloballyCoherent() const
Coherence domain of a memory instruction.
bool isAtomicExch() const
std::vector< int > tlbHitLevel
bool isKernArgSeg() const
Stats::Scalar dynamicGMemInstrCnt
bool isSystemScope() const
bool isUnconditionalJump() const
bool isReadOnlySeg() const
bool isDeviceScope() const
bool isAtomicNoRet() const
bool isDeviceScope() const
int getOperandSize(int operandIdx)
bool isSystemScope() const
bool isSystemCoherent() const
virtual bool isCondRegister(int operandIndex)=0
Stats::Scalar dynamicLMemInstrCnt
bool isWorkitemScope() const
GPUDynInst(ComputeUnit *_cu, Wavefront *_wf, GPUStaticInst *static_inst, uint64_t instSeqNum)
Enums::StorageClassType executedAs()
bool isPrivateSeg() const
std::shared_ptr< GPUDynInst > GPUDynInstPtr
bool isUnconditionalJump() const
virtual bool isDstOperand(int operandIndex)=0
virtual bool isScalarRegister(int operandIndex)=0
bool isGloballyCoherent() const
bool isAcquireRelease() const
bool isAtomicNoRet() const
virtual int numDstRegOperands()=0
Stats::Distribution pageDivergenceDist
bool isCondRegister(int operandIdx)
bool isKernArgSeg() const
bool isAcquireRelease() const
bool isVectorRegister(int operandIdx)
bool isAtomicExch() const
Enums::StorageClassType executed_as
virtual int getRegisterIndex(int operandIndex, GPUDynInstPtr gpuDynInst)=0
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
bool isScalarRegister(int operandIdx)
bool isSrcOperand(int operandIdx)
virtual bool isSrcOperand(int operandIndex)=0
bool isRelaxedOrder() const
bool isWorkgroupScope() const
bool isReadOnlySeg() const
virtual int getNumOperands()=0
void completeAcc(GPUDynInstPtr gpuDynInst)
bool isWavefrontScope() const
GPUStaticInst * _staticInst
int getRegisterIndex(int operandIdx, GPUDynInstPtr gpuDynInst)
const std::string & disassemble() const
bool isRelaxedOrder() const
void execute(GPUDynInstPtr gpuDynInst)
const std::string & disassemble()
std::map< Addr, int > pagesTouched
bool isALU() const
accessor methods for the attributes of the underlying GPU static instruction
ComputeUnit * computeUnit()
virtual int numSrcRegOperands()=0
virtual bool isVectorRegister(int operandIndex)=0
virtual void execute(GPUDynInstPtr gpuDynInst)=0
bool isDstOperand(int operandIdx)
pageDataStruct pageAccesses
virtual void initiateAcc(GPUDynInstPtr gpuDynInst)
virtual int getOperandSize(int operandIndex)=0
bool isWavefrontScope() const
void initiateAcc(GPUDynInstPtr gpuDynInst)
bool isWorkitemScope() const
bool isPrivateSeg() const
void sample(const U &v, int n=1)
Add a value to the distribtion n times.