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gpu_isa.hh
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33 
34 #ifndef __ARCH_HSAIL_GPU_ISA_HH__
35 #define __ARCH_HSAIL_GPU_ISA_HH__
36 
37 #include <cstdint>
38 
39 #include "arch/hsail/gpu_types.hh"
40 #include "base/logging.hh"
41 #include "base/types.hh"
42 #include "gpu-compute/misc.hh"
43 
44 namespace HsailISA
45 {
46  class GPUISA
47  {
48  public:
50  {
51  }
52 
53  void
54  writeMiscReg(int opIdx, RegVal operandVal)
55  {
56  fatal("HSAIL does not implement misc registers yet\n");
57  }
58 
59  RegVal
60  readMiscReg(int opIdx) const
61  {
62  fatal("HSAIL does not implement misc registers yet\n");
63  }
64 
65  bool hasScalarUnit() const { return false; }
66 
67  uint32_t
68  advancePC(uint32_t old_pc, GPUDynInstPtr gpuDynInst)
69  {
70  return old_pc + sizeof(RawMachInst);
71  }
72  };
73 }
74 
75 #endif // __ARCH_HSAIL_GPU_ISA_HH__
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:171
bool hasScalarUnit() const
Definition: gpu_isa.hh:65
uint64_t RegVal
Definition: types.hh:166
RegVal readMiscReg(int opIdx) const
Definition: gpu_isa.hh:60
std::shared_ptr< GPUDynInst > GPUDynInstPtr
Definition: misc.hh:46
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,16,32,64}_t.
uint32_t advancePC(uint32_t old_pc, GPUDynInstPtr gpuDynInst)
Definition: gpu_isa.hh:68
void writeMiscReg(int opIdx, RegVal operandVal)
Definition: gpu_isa.hh:54
uint32_t RawMachInst
Definition: gpu_types.hh:54

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