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pagetable.hh
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1 /*
2  * Copyright (c) 2002-2005 The Regents of The University of Michigan
3  * Copyright (c) 2007 MIPS Technologies, Inc.
4  * Copyright (c) 2007-2008 The Florida State University
5  * Copyright (c) 2009 The University of Edinburgh
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31 
32 #ifndef __ARCH_POWER_PAGETABLE_H__
33 #define __ARCH_POWER_PAGETABLE_H__
34 
35 #include "arch/power/isa_traits.hh"
36 #include "arch/power/utility.hh"
37 
38 namespace PowerISA
39 {
40 
41 static inline Addr PteAddr(Addr a) { return (a & PteMask) << PteShift; }
42 
43 struct VAddr
44 {
45  static const int ImplBits = 43;
46  static const Addr ImplMask = (ULL(1) << ImplBits) - 1;
47  static const Addr UnImplMask = ~ImplMask;
48 
50 
52  : addr(a)
53  {}
54 
55  operator Addr() const
56  {
57  return addr;
58  }
59 
60  const VAddr
62  {
63  addr = a;
64  return *this;
65  }
66 
67  Addr
68  vpn() const
69  {
70  return (addr & ImplMask) >> PageShift;
71  }
72 
73  Addr
74  page() const
75  {
76  return addr & Page_Mask;
77  }
78 
79  Addr
80  offset() const
81  {
82  return addr & PageOffset;
83  }
84 
85  Addr
86  level3() const
87  {
88  return PowerISA::PteAddr(addr >> PageShift);
89  }
90 
91  Addr
92  level2() const
93  {
94  return PowerISA::PteAddr(addr >> (NPtePageShift + PageShift));
95  }
96 
97  Addr
98  level1() const
99  {
100  return PowerISA::PteAddr(addr >> (2 * NPtePageShift + PageShift));
101  }
102 };
103 
104 // ITB/DTB page table entry
105 struct PTE
106 {
107  // What parts of the VAddr (from bits 28..11) should be used in
108  // translation (includes Mask and MaskX from PageMask)
110 
111  // Virtual Page Number (/2) (Includes VPN2 + VPN2X .. bits 31..11
112  // from EntryHi)
114 
115  // Address Space ID (8 bits) // Lower 8 bits of EntryHi
116  uint8_t asid;
117 
118  // Global Bit - Obtained by an *AND* of EntryLo0 and EntryLo1 G bit
119  bool G;
120 
121  /* Contents of Entry Lo0 */
122  Addr PFN0; // Physical Frame Number - Even
123  bool D0; // Even entry Dirty Bit
124  bool V0; // Even entry Valid Bit
125  uint8_t C0; // Cache Coherency Bits - Even
126 
127  /* Contents of Entry Lo1 */
128  Addr PFN1; // Physical Frame Number - Odd
129  bool D1; // Odd entry Dirty Bit
130  bool V1; // Odd entry Valid Bit
131  uint8_t C1; // Cache Coherency Bits (3 bits)
132 
133  // The next few variables are put in as optimizations to reduce TLB
134  // lookup overheads. For a given Mask, what is the address shift amount
135  // and what is the OffsetMask
138 
139  bool
141  {
142  return (V0 | V1);
143  };
144 
145  void serialize(CheckpointOut &cp) const;
146  void unserialize(CheckpointIn &cp);
147 };
148 
149 } // namespace PowerISA
150 
151 #endif // __ARCH_POWER_PAGETABLE_H__
152 
const Addr PteMask
Definition: isa_traits.hh:53
uint8_t C0
Definition: pagetable.hh:125
static Addr PteAddr(Addr a)
Definition: pagetable.hh:41
Addr level2() const
Definition: pagetable.hh:92
const VAddr & operator=(Addr a)
Definition: pagetable.hh:61
VAddr(Addr a)
Definition: pagetable.hh:51
Definition: cprintf.cc:40
uint8_t asid
Definition: pagetable.hh:116
Addr level3() const
Definition: pagetable.hh:86
bool Valid()
Definition: pagetable.hh:140
void serialize(const ThreadContext &tc, CheckpointOut &cp)
Thread context serialization helpers.
const Addr PageOffset
Definition: isa_traits.hh:48
Addr offset() const
Definition: pagetable.hh:80
static const Addr ImplMask
Definition: pagetable.hh:46
Addr page() const
Definition: pagetable.hh:74
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:140
#define ULL(N)
uint64_t constant
Definition: types.hh:48
Bitfield< 5 > a
Definition: pagetable.hh:146
const Addr NPtePageShift
Definition: isa_traits.hh:51
Addr vpn() const
Definition: pagetable.hh:68
uint8_t C1
Definition: pagetable.hh:131
const Addr Page_Mask
Definition: isa_traits.hh:47
std::ostream CheckpointOut
Definition: serialize.hh:63
int AddrShiftAmount
Definition: pagetable.hh:136
static const int ImplBits
Definition: pagetable.hh:45
void unserialize(ThreadContext &tc, CheckpointIn &cp)
const Addr PageShift
Definition: isa_traits.hh:45
static const Addr UnImplMask
Definition: pagetable.hh:47
Addr level1() const
Definition: pagetable.hh:98
const Addr PteShift
Definition: isa_traits.hh:50

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