gem5
v20.1.0.0
dev
arm
a9scu.hh
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2010 ARM Limited
3
* All rights reserved
4
*
5
* The license below extends only to copyright in the software and shall
6
* not be construed as granting a license to any other intellectual
7
* property including but not limited to intellectual property relating
8
* to a hardware implementation of the functionality of the software
9
* licensed hereunder. You may use the software subject to the license
10
* terms below provided that you ensure that this notice is replicated
11
* unmodified and in its entirety in all distributions of the software,
12
* modified or unmodified, in source code or in binary form.
13
*
14
* Redistribution and use in source and binary forms, with or without
15
* modification, are permitted provided that the following conditions are
16
* met: redistributions of source code must retain the above copyright
17
* notice, this list of conditions and the following disclaimer;
18
* redistributions in binary form must reproduce the above copyright
19
* notice, this list of conditions and the following disclaimer in the
20
* documentation and/or other materials provided with the distribution;
21
* neither the name of the copyright holders nor the names of its
22
* contributors may be used to endorse or promote products derived from
23
* this software without specific prior written permission.
24
*
25
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36
*/
37
38
#ifndef __DEV_ARM_A9SCU_HH__
39
#define __DEV_ARM_A9SCU_HH__
40
41
#include "
dev/io_device.hh
"
42
#include "params/A9SCU.hh"
43
48
class
A9SCU
:
public
BasicPioDevice
49
{
50
protected
:
51
enum
{
52
Control
= 0x00,
53
Config
= 0x04,
54
};
55
56
public
:
57
typedef
A9SCUParams
Params
;
58
63
A9SCU
(
Params
*
p
);
64
70
virtual
Tick
read
(
PacketPtr
pkt);
71
77
virtual
Tick
write
(
PacketPtr
pkt);
78
};
79
80
81
#endif // __DEV_ARM_A9SCU_HH__
82
A9SCU::Config
@ Config
Definition:
a9scu.hh:53
io_device.hh
A9SCU::Params
A9SCUParams Params
Definition:
a9scu.hh:57
A9SCU::read
virtual Tick read(PacketPtr pkt)
Handle a read to the device.
Definition:
a9scu.cc:52
Tick
uint64_t Tick
Tick count type.
Definition:
types.hh:63
A9SCU
Definition:
a9scu.hh:48
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition:
packet.hh:257
BasicPioDevice
Definition:
io_device.hh:150
A9SCU::Control
@ Control
Definition:
a9scu.hh:52
A9SCU::A9SCU
A9SCU(Params *p)
The constructor for RealView just registers itself with the MMU.
Definition:
a9scu.cc:46
MipsISA::p
Bitfield< 0 > p
Definition:
pra_constants.hh:323
A9SCU::write
virtual Tick write(PacketPtr pkt)
All writes are panic.
Definition:
a9scu.cc:92
Generated on Wed Sep 30 2020 14:02:10 for gem5 by
doxygen
1.8.17