gem5  v20.1.0.0
Classes | Namespaces | Typedefs | Enumerations | Functions | Variables
types.hh File Reference
#include <iostream>
#include "arch/generic/types.hh"
#include "base/bitunion.hh"
#include "base/cprintf.hh"
#include "base/types.hh"
#include "sim/serialize.hh"

Go to the source code of this file.

Classes

struct  X86ISA::ExtMachInst
 
class  X86ISA::PCState
 
struct  std::hash< X86ISA::ExtMachInst >
 

Namespaces

 X86ISA
 This is exposed globally, independent of the ISA.
 
 std
 Overload hash function for BasicBlockRange type.
 

Typedefs

typedef uint64_t X86ISA::MachInst
 

Enumerations

enum  X86ISA::Prefixes {
  X86ISA::NoOverride, X86ISA::ESOverride, X86ISA::CSOverride, X86ISA::SSOverride,
  X86ISA::DSOverride, X86ISA::FSOverride, X86ISA::GSOverride, X86ISA::RexPrefix,
  X86ISA::OperandSizeOverride, X86ISA::AddressSizeOverride, X86ISA::Lock, X86ISA::Rep,
  X86ISA::Repne, X86ISA::Vex2Prefix, X86ISA::Vex3Prefix, X86ISA::XopPrefix
}
 
enum  X86ISA::X86SubMode {
  X86ISA::SixtyFourBitMode, X86ISA::CompatabilityMode, X86ISA::ProtectedMode, X86ISA::Virtual8086Mode,
  X86ISA::RealMode
}
 

Functions

 X86ISA::BitUnion8 (LegacyPrefixVector) Bitfield< 7
 
 X86ISA::EndBitUnion (LegacyPrefixVector) BitUnion8(ModRM) Bitfield< 7
 
 X86ISA::EndBitUnion (ModRM) BitUnion8(Sib) Bitfield< 7
 
 X86ISA::EndBitUnion (Sib) BitUnion8(Rex) Bitfield< 6 > present
 
 X86ISA::EndBitUnion (Rex) BitUnion8(Vex2Of3) Bitfield< 7 > r
 
 X86ISA::EndBitUnion (Vex2Of3) BitUnion8(Vex3Of3) Bitfield< 7 > w
 
 X86ISA::EndBitUnion (Vex3Of3) BitUnion8(Vex2Of2) Bitfield< 7 > r
 
 X86ISA::EndBitUnion (Vex2Of2) BitUnion8(VexInfo) Bitfield< 6
 
 X86ISA::EndBitUnion (VexInfo) enum OpcodeType
 
static const char * X86ISA::opcodeTypeToStr (OpcodeType type)
 
 X86ISA::BitUnion8 (Opcode) Bitfield< 7
 
 X86ISA::EndBitUnion (Opcode) BitUnion8(OperatingMode) Bitfield< 3 > mode
 
 X86ISA::EndBitUnion (OperatingMode) enum X86Mode
 
static std::ostream & X86ISA::operator<< (std::ostream &os, const ExtMachInst &emi)
 
static bool X86ISA::operator== (const ExtMachInst &emi1, const ExtMachInst &emi2)
 
template<>
void paramOut (CheckpointOut &cp, const std::string &name, const X86ISA::ExtMachInst &machInst)
 
template<>
void paramIn (CheckpointIn &cp, const std::string &name, X86ISA::ExtMachInst &machInst)
 

Variables

 X86ISA::decodeVal
 
Bitfield< 7 > X86ISA::repne
 
Bitfield< 6 > X86ISA::rep
 
Bitfield< 5 > X86ISA::lock
 
Bitfield< 4 > X86ISA::op
 
Bitfield< 3 > X86ISA::addr
 
Bitfield< 2, 0 > X86ISA::seg
 
 X86ISA::mod
 
Bitfield< 5, 3 > X86ISA::reg
 
Bitfield< 2, 0 > X86ISA::rm
 
 X86ISA::scale
 
Bitfield< 5, 3 > X86ISA::index
 
Bitfield< 1 > X86ISA::x
 
Bitfield< 4, 0 > X86ISA::m
 
Bitfield< 6, 3 > X86ISA::v
 
 X86ISA::top5
 
Bitfield< 2, 0 > X86ISA::bottom3
 

Function Documentation

◆ paramIn()

template<>
void paramIn ( CheckpointIn cp,
const std::string &  name,
X86ISA::ExtMachInst machInst 
)

◆ paramOut()

template<>
void paramOut ( CheckpointOut cp,
const std::string &  name,
const X86ISA::ExtMachInst machInst 
)

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