bpred_unit.hh

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/*
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#ifndef __CPU_PRED_BPRED_UNIT_HH__
#define __CPU_PRED_BPRED_UNIT_HH__
 
#include <deque>
 
#include "base/statistics.hh"
#include "base/types.hh"
#include "cpu/pred/btb.hh"
#include "cpu/pred/indirect.hh"
#include "cpu/pred/ras.hh"
#include "cpu/inst_seq.hh"
#include "cpu/static_inst.hh"
#include "params/BranchPredictor.hh"
#include "sim/probe/pmu.hh"
#include "sim/sim_object.hh"
 
class BPredUnit : public SimObject
{
  public:
      typedef BranchPredictorParams Params;
    BPredUnit(const Params *p);
 
    void regProbePoints() override;
 
    void drainSanityCheck() const;
 
    bool predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
                 TheISA::PCState &pc, ThreadID tid);
 
    // @todo: Rename this function.
    virtual void uncondBranch(ThreadID tid, Addr pc, void * &bp_history) = 0;
 
    void update(const InstSeqNum &done_sn, ThreadID tid);
 
    void squash(const InstSeqNum &squashed_sn, ThreadID tid);
 
    void squash(const InstSeqNum &squashed_sn,
                const TheISA::PCState &corr_target,
                bool actually_taken, ThreadID tid);
 
    virtual void squash(ThreadID tid, void *bp_history) = 0;
 
    virtual bool lookup(ThreadID tid, Addr instPC, void * &bp_history) = 0;
 
    virtual void btbUpdate(ThreadID tid, Addr instPC, void * &bp_history) = 0;
 
    bool BTBValid(Addr instPC)
    { return BTB.valid(instPC, 0); }
 
    TheISA::PCState BTBLookup(Addr instPC)
    { return BTB.lookup(instPC, 0); }
 
    virtual void update(ThreadID tid, Addr instPC, bool taken,
                   void *bp_history, bool squashed,
                   const StaticInstPtr &inst, Addr corrTarget) = 0;
    void BTBUpdate(Addr instPC, const TheISA::PCState &target)
    { BTB.update(instPC, target, 0); }
 
 
    void dump();
 
  private:
    struct PredictorHistory {
        PredictorHistory(const InstSeqNum &seq_num, Addr instPC,
                         bool pred_taken, void *bp_history,
                         void *indirect_history, ThreadID _tid,
                         const StaticInstPtr & inst)
            : seqNum(seq_num), pc(instPC), bpHistory(bp_history),
              indirectHistory(indirect_history), RASTarget(0), RASIndex(0),
              tid(_tid), predTaken(pred_taken), usedRAS(0), pushedRAS(0),
              wasCall(0), wasReturn(0), wasIndirect(0), target(MaxAddr),
              inst(inst)
        {}
 
        bool operator==(const PredictorHistory &entry) const {
            return this->seqNum == entry.seqNum;
        }
 
        InstSeqNum seqNum;
 
        Addr pc;
 
        void *bpHistory;
 
        void *indirectHistory;
 
        TheISA::PCState RASTarget;
 
        unsigned RASIndex;
 
        ThreadID tid;
 
        bool predTaken;
 
        bool usedRAS;
 
        /* Whether or not the RAS was pushed */
        bool pushedRAS;
 
        bool wasCall;
 
        bool wasReturn;
 
        bool wasIndirect;
 
        Addr target;
 
        const StaticInstPtr inst;
    };
 
    typedef std::deque<PredictorHistory> History;
 
    const unsigned numThreads;
 
 
    std::vector<History> predHist;
 
    DefaultBTB BTB;
 
    std::vector<ReturnAddrStack> RAS;
 
    IndirectPredictor * iPred;
 
    struct BPredUnitStats : public Stats::Group {
        BPredUnitStats(Stats::Group *parent);
 
        Stats::Scalar lookups;
        Stats::Scalar condPredicted;
        Stats::Scalar condIncorrect;
        Stats::Scalar BTBLookups;
        Stats::Scalar BTBHits;
        Stats::Formula BTBHitPct;
        Stats::Scalar RASUsed;
        Stats::Scalar RASIncorrect;
 
        Stats::Scalar indirectLookups;
        Stats::Scalar indirectHits;
        Stats::Scalar indirectMisses;
        Stats::Scalar indirectMispredicted;
    } stats;
 
  protected:
    const unsigned instShiftAmt;
 
    ProbePoints::PMUUPtr pmuProbePoint(const char *name);
 
 
    ProbePoints::PMUUPtr ppBranches;
 
    ProbePoints::PMUUPtr ppMisses;
 
};
 
#endif // __CPU_PRED_BPRED_UNIT_HH__