gem5  v20.1.0.0
FastModel::CortexA76TC Member List

This is the complete list of members for FastModel::CortexA76TC, including all inherited members.

_contextIdIris::ThreadContextprotected
_cpuIris::ThreadContextprotected
_dtbIris::ThreadContextprotected
_instIdIris::ThreadContextprotected
_irisPathIris::ThreadContextprotected
_isaIris::ThreadContextprotected
_itbIris::ThreadContextprotected
_statusIris::ThreadContextprotected
_systemIris::ThreadContextprotected
_threadIdIris::ThreadContextprotected
activate() overrideIris::ThreadContextinlinevirtual
Active enum valueThreadContext
BpId typedefIris::ThreadContextprotected
BpInfoIt typedefIris::ThreadContextprotected
BpInfoMap typedefIris::ThreadContextprotected
BpInfoPtr typedefIris::ThreadContextprotected
bpsIris::ThreadContextprotected
bpSpaceIdsFastModel::CortexA76TCprotectedstatic
breakpointEventStreamIdIris::ThreadContextprotected
breakpointHit(uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)Iris::ThreadContextprotected
call() constIris::ThreadContextinlineprotected
ccRegIdsIris::ThreadContextprotected
ccRegIdxNameMapFastModel::CortexA76TCprotectedstatic
clearArchRegs() overrideIris::ThreadContextinlinevirtual
clientIris::ThreadContextmutableprotected
comInstEventQueueIris::ThreadContextprotected
compare(ThreadContext *one, ThreadContext *two)ThreadContextstatic
contextId() const overrideIris::ThreadContextinlinevirtual
copyArchRegs(::ThreadContext *tc) overrideIris::ThreadContextinline
ThreadContext::copyArchRegs(ThreadContext *tc)=0ThreadContextpure virtual
CortexA76TC(::BaseCPU *cpu, int id, System *system, ::BaseTLB *dtb, ::BaseTLB *itb, ::BaseISA *isa, iris::IrisConnectionInterface *iris_if, const std::string &iris_path)FastModel::CortexA76TC
cpuId() const overrideIris::ThreadContextinlinevirtual
DefaultFloatResultThreadContextstatic
DefaultIntResultThreadContextstatic
delBp(BpInfoIt it)Iris::ThreadContextprotected
descheduleInstCountEvent(Event *event) overrideIris::ThreadContextvirtual
enableAfterPseudoEventIris::ThreadContextprotected
exit()ThreadContextinlinevirtual
extractResourceId(const ResourceMap &resources, const std::string &name)Iris::ThreadContextprotected
extractResourceMap(ResourceIds &ids, const ResourceMap &resources, const IdxNameMap &idx_names)Iris::ThreadContextprotected
flattenedIntIdsIris::ThreadContextprotected
flattenedIntIdxNameMapFastModel::CortexA76TCprotectedstatic
flattenRegId(const RegId &regId) const overrideIris::ThreadContextinlinevirtual
floatResultThreadContext
floatsThreadContextstatic
getBpSpaceIds() const overrideFastModel::CortexA76TCvirtual
getCheckerCpuPtr() overrideIris::ThreadContextinlinevirtual
getCpuPtr() overrideIris::ThreadContextinlinevirtual
getCurrentInstCount() overrideIris::ThreadContextvirtual
getDecoderPtr() overrideIris::ThreadContextinlinevirtual
getDTBPtr() overrideIris::ThreadContextinlinevirtual
getHtmCheckpointPtr() overrideIris::ThreadContextinlinevirtual
getIsaPtr() overrideIris::ThreadContextinlinevirtual
getITBPtr() overrideIris::ThreadContextinlinevirtual
getOrAllocBp(Addr pc)Iris::ThreadContextprotected
getPhysProxy() overrideIris::ThreadContextinlinevirtual
getProcessPtr() overrideIris::ThreadContextinlinevirtual
getSystemPtr() overrideIris::ThreadContextinlinevirtual
getVirtProxy() overrideIris::ThreadContextinlinevirtual
getWritableVecPredReg(const RegId &reg) overrideIris::ThreadContextinlinevirtual
getWritableVecPredRegFlat(RegIndex idx) overrideIris::ThreadContextinlinevirtual
getWritableVecReg(const RegId &reg) overrideIris::ThreadContextinlinevirtual
getWritableVecRegFlat(RegIndex idx) overrideIris::ThreadContextinlinevirtual
halt() overrideIris::ThreadContextinlinevirtual
Halted enum valueThreadContext
Halting enum valueThreadContext
htmAbortTransaction(uint64_t htm_uid, HtmFailureFaultCause cause) overrideIris::ThreadContextinlinevirtual
icountRscIdIris::ThreadContextprotected
IdxNameMap typedefIris::ThreadContext
initEventStreamIdIris::ThreadContextprotected
initFromIrisInstance(const ResourceMap &resources) overrideFastModel::CortexA76TCvirtual
initMemProxies(::ThreadContext *tc) overrideIris::ThreadContext
ThreadContext::initMemProxies(ThreadContext *tc)=0ThreadContextpure virtual
instAddr() const overrideIris::ThreadContextvirtual
installBp(BpInfoIt it)Iris::ThreadContextprotected
instanceRegistryChanged(uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)Iris::ThreadContextprotected
intOffsetThreadContext
intReg32IdsIris::ThreadContextprotected
intReg32IdxNameMapFastModel::CortexA76TCprotectedstatic
intReg64IdsIris::ThreadContextprotected
intReg64IdxNameMapFastModel::CortexA76TCprotectedstatic
intResultThreadContext
intsThreadContextstatic
MachInst typedefThreadContextprotected
maintainStepping()Iris::ThreadContextprotected
memorySpacesIris::ThreadContextprotected
microPC() const overrideIris::ThreadContextinlinevirtual
miscRegIdsIris::ThreadContextprotected
miscRegIdxNameMapFastModel::CortexA76TCprotectedstatic
nextInstAddr() const overrideIris::ThreadContextvirtual
noThrow() constIris::ThreadContextinlineprotected
pcRscIdIris::ThreadContextprotected
pcState() const overrideIris::ThreadContextvirtual
pcState(const ArmISA::PCState &val) overrideIris::ThreadContext
ThreadContext::pcState(const TheISA::PCState &val)=0ThreadContextpure virtual
pcStateNoRecord(const ArmISA::PCState &val) overrideIris::ThreadContextinline
ThreadContext::pcStateNoRecord(const TheISA::PCState &val)=0ThreadContextpure virtual
phaseInitLeave(uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)Iris::ThreadContextprotected
physProxyIris::ThreadContextprotected
quiesce()ThreadContext
quiesceTick(Tick resume)ThreadContext
readCCReg(RegIndex reg_idx) const overrideIris::ThreadContextinlinevirtual
readCCRegFlat(RegIndex idx) const overrideFastModel::CortexA76TCvirtual
readFloatReg(RegIndex reg_idx) const overrideIris::ThreadContextinlinevirtual
readFloatRegFlat(RegIndex idx) const overrideIris::ThreadContextinlinevirtual
readFuncExeInst() const overrideIris::ThreadContextinlinevirtual
readIntReg(RegIndex reg_idx) const overrideIris::ThreadContextvirtual
readIntRegFlat(RegIndex idx) const overrideFastModel::CortexA76TCvirtual
readLastActivate() overrideIris::ThreadContextinlinevirtual
readLastSuspend() overrideIris::ThreadContextinlinevirtual
readMiscReg(RegIndex misc_reg) overrideIris::ThreadContextinlinevirtual
readMiscRegNoEffect(RegIndex misc_reg) const overrideIris::ThreadContextvirtual
readStCondFailures() const overrideIris::ThreadContextinlinevirtual
readVec16BitLaneReg(const RegId &reg) const overrideIris::ThreadContextinlinevirtual
readVec32BitLaneReg(const RegId &reg) const overrideIris::ThreadContextinlinevirtual
readVec64BitLaneReg(const RegId &reg) const overrideIris::ThreadContextinlinevirtual
readVec8BitLaneReg(const RegId &reg) const overrideIris::ThreadContextinlinevirtual
readVecElem(const RegId &reg) const overrideIris::ThreadContextinlinevirtual
readVecElemFlat(RegIndex idx, const ElemIndex &elemIdx) const overrideIris::ThreadContextinlinevirtual
readVecPredReg(const RegId &reg) const overrideIris::ThreadContextvirtual
readVecPredRegFlat(RegIndex idx) const overrideIris::ThreadContextvirtual
readVecReg(const RegId &reg) const overrideIris::ThreadContextvirtual
readVecRegFlat(RegIndex idx) const overrideIris::ThreadContextvirtual
regEventStreamIdIris::ThreadContextprotected
regStats(const std::string &name) overrideIris::ThreadContextinlinevirtual
remove(PCEvent *e) overrideIris::ThreadContextvirtual
ResourceIds typedefIris::ThreadContext
ResourceMap typedefIris::ThreadContext
schedule(PCEvent *e) overrideIris::ThreadContextvirtual
scheduleInstCountEvent(Event *event, Tick count) overrideIris::ThreadContextvirtual
semihostingEvent(uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)Iris::ThreadContextprotected
semihostingEventStreamIdIris::ThreadContextprotected
setCCReg(RegIndex reg_idx, RegVal val) overrideIris::ThreadContextinlinevirtual
setCCRegFlat(RegIndex idx, RegVal val) overrideFastModel::CortexA76TCvirtual
setContextId(int id) overrideIris::ThreadContextinlinevirtual
setFloatReg(RegIndex reg_idx, RegVal val) overrideIris::ThreadContextinlinevirtual
setFloatRegFlat(RegIndex idx, RegVal val) overrideIris::ThreadContextinlinevirtual
setHtmCheckpointPtr(BaseHTMCheckpointPtr cpt) overrideIris::ThreadContextinlinevirtual
setIntReg(RegIndex reg_idx, RegVal val) overrideIris::ThreadContextvirtual
setIntRegFlat(RegIndex idx, RegVal val) overrideFastModel::CortexA76TCvirtual
setMiscReg(RegIndex misc_reg, const RegVal val) overrideIris::ThreadContextinlinevirtual
setMiscRegNoEffect(RegIndex misc_reg, const RegVal val) overrideIris::ThreadContextvirtual
setNPC(Addr val)ThreadContextinline
setProcessPtr(Process *p) overrideIris::ThreadContextinlinevirtual
setStatus(Status new_status) overrideIris::ThreadContextvirtual
setStCondFailures(unsigned sc_failures) overrideIris::ThreadContextinlinevirtual
setThreadId(int id) overrideIris::ThreadContextinlinevirtual
setVecElem(const RegId &reg, const VecElem &val) overrideIris::ThreadContextinlinevirtual
setVecElemFlat(RegIndex idx, const ElemIndex &elemIdx, const VecElem &val) overrideIris::ThreadContextinlinevirtual
setVecLane(const RegId &reg, const LaneData< LaneSize::Byte > &val) overrideIris::ThreadContextinlinevirtual
setVecLane(const RegId &reg, const LaneData< LaneSize::TwoByte > &val) overrideIris::ThreadContextinlinevirtual
setVecLane(const RegId &reg, const LaneData< LaneSize::FourByte > &val) overrideIris::ThreadContextinlinevirtual
setVecLane(const RegId &reg, const LaneData< LaneSize::EightByte > &val) overrideIris::ThreadContextinlinevirtual
setVecPredReg(const RegId &reg, const VecPredRegContainer &val) overrideIris::ThreadContextinlinevirtual
setVecPredRegFlat(RegIndex idx, const VecPredRegContainer &val) overrideIris::ThreadContextinlinevirtual
setVecReg(const RegId &reg, const VecRegContainer &val) overrideIris::ThreadContextinlinevirtual
setVecRegFlat(RegIndex idx, const VecRegContainer &val) overrideIris::ThreadContextinlinevirtual
simulationTimeEvent(uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)Iris::ThreadContextprotected
socketId() const overrideIris::ThreadContextinlinevirtual
status() const overrideIris::ThreadContextvirtual
Status enum nameThreadContext
suspend() overrideIris::ThreadContextinlinevirtual
Suspended enum valueThreadContext
syscall()=0ThreadContextpure virtual
takeOverFrom(::ThreadContext *old_context) overrideIris::ThreadContextinline
ThreadContext::takeOverFrom(ThreadContext *old_context)=0ThreadContextpure virtual
ThreadContext(::BaseCPU *cpu, int id, System *system, ::BaseTLB *dtb, ::BaseTLB *itb, ::BaseISA *isa, iris::IrisConnectionInterface *iris_if, const std::string &iris_path)Iris::ThreadContext
threadId() const overrideIris::ThreadContextinlinevirtual
timeEventStreamIdIris::ThreadContextprotected
translateAddress(Addr &paddr, Addr vaddr) overrideFastModel::CortexA76TCvirtual
Iris::ThreadContext::translateAddress(Addr &paddr, iris::MemorySpaceId p_space, Addr vaddr, iris::MemorySpaceId v_space)Iris::ThreadContextprotected
translationsIris::ThreadContextprotected
uninstallBp(BpInfoIt it)Iris::ThreadContextprotected
VecElem typedefThreadContextprotected
VecPredRegContainer typedefThreadContextprotected
vecPredRegIdsIris::ThreadContextprotected
vecPredRegsIris::ThreadContextmutableprotected
VecRegContainer typedefThreadContextprotected
vecRegIdsIris::ThreadContextprotected
vecRegIdxNameMapFastModel::CortexA76TCprotectedstatic
vecRegsIris::ThreadContextmutableprotected
virtProxyIris::ThreadContextprotected
~ThreadContext()Iris::ThreadContextvirtual

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