gem5  v20.1.0.0
Public Types | Public Member Functions | Static Public Member Functions | Public Attributes | Static Public Attributes | Protected Types | List of all members
ThreadContext Class Referenceabstract

ThreadContext is the external interface to all thread state for anything outside of the CPU. More...

#include <thread_context.hh>

Inheritance diagram for ThreadContext:
PCEventScope CheckerThreadContext< TC > Iris::ThreadContext SimpleThread FastModel::CortexA76TC

Public Types

enum  Status { Active, Suspended, Halting, Halted }
 

Public Member Functions

virtual ~ThreadContext ()
 
virtual BaseCPUgetCpuPtr ()=0
 
virtual int cpuId () const =0
 
virtual uint32_t socketId () const =0
 
virtual int threadId () const =0
 
virtual void setThreadId (int id)=0
 
virtual ContextID contextId () const =0
 
virtual void setContextId (ContextID id)=0
 
virtual BaseTLBgetITBPtr ()=0
 
virtual BaseTLBgetDTBPtr ()=0
 
virtual CheckerCPUgetCheckerCpuPtr ()=0
 
virtual BaseISAgetIsaPtr ()=0
 
virtual TheISA::Decoder * getDecoderPtr ()=0
 
virtual SystemgetSystemPtr ()=0
 
virtual PortProxygetPhysProxy ()=0
 
virtual PortProxygetVirtProxy ()=0
 
virtual void initMemProxies (ThreadContext *tc)=0
 Initialise the physical and virtual port proxies and tie them to the data port of the CPU. More...
 
virtual ProcessgetProcessPtr ()=0
 
virtual void setProcessPtr (Process *p)=0
 
virtual Status status () const =0
 
virtual void setStatus (Status new_status)=0
 
virtual void activate ()=0
 Set the status to Active. More...
 
virtual void suspend ()=0
 Set the status to Suspended. More...
 
virtual void halt ()=0
 Set the status to Halted. More...
 
void quiesce ()
 Quiesce thread context. More...
 
void quiesceTick (Tick resume)
 Quiesce, suspend, and schedule activate at resume. More...
 
virtual void takeOverFrom (ThreadContext *old_context)=0
 
virtual void regStats (const std::string &name)
 
virtual void scheduleInstCountEvent (Event *event, Tick count)=0
 
virtual void descheduleInstCountEvent (Event *event)=0
 
virtual Tick getCurrentInstCount ()=0
 
virtual Tick readLastActivate ()=0
 
virtual Tick readLastSuspend ()=0
 
virtual void copyArchRegs (ThreadContext *tc)=0
 
virtual void clearArchRegs ()=0
 
virtual RegVal readIntReg (RegIndex reg_idx) const =0
 
virtual RegVal readFloatReg (RegIndex reg_idx) const =0
 
virtual const VecRegContainerreadVecReg (const RegId &reg) const =0
 
virtual VecRegContainergetWritableVecReg (const RegId &reg)=0
 
virtual const VecElemreadVecElem (const RegId &reg) const =0
 
virtual const VecPredRegContainerreadVecPredReg (const RegId &reg) const =0
 
virtual VecPredRegContainergetWritableVecPredReg (const RegId &reg)=0
 
virtual RegVal readCCReg (RegIndex reg_idx) const =0
 
virtual void setIntReg (RegIndex reg_idx, RegVal val)=0
 
virtual void setFloatReg (RegIndex reg_idx, RegVal val)=0
 
virtual void setVecReg (const RegId &reg, const VecRegContainer &val)=0
 
virtual void setVecElem (const RegId &reg, const VecElem &val)=0
 
virtual void setVecPredReg (const RegId &reg, const VecPredRegContainer &val)=0
 
virtual void setCCReg (RegIndex reg_idx, RegVal val)=0
 
virtual TheISA::PCState pcState () const =0
 
virtual void pcState (const TheISA::PCState &val)=0
 
void setNPC (Addr val)
 
virtual void pcStateNoRecord (const TheISA::PCState &val)=0
 
virtual Addr instAddr () const =0
 
virtual Addr nextInstAddr () const =0
 
virtual MicroPC microPC () const =0
 
virtual RegVal readMiscRegNoEffect (RegIndex misc_reg) const =0
 
virtual RegVal readMiscReg (RegIndex misc_reg)=0
 
virtual void setMiscRegNoEffect (RegIndex misc_reg, RegVal val)=0
 
virtual void setMiscReg (RegIndex misc_reg, RegVal val)=0
 
virtual RegId flattenRegId (const RegId &regId) const =0
 
virtual unsigned readStCondFailures () const =0
 
virtual void setStCondFailures (unsigned sc_failures)=0
 
virtual Counter readFuncExeInst () const =0
 
virtual void syscall ()=0
 
virtual int exit ()
 
virtual void htmAbortTransaction (uint64_t htm_uid, HtmFailureFaultCause cause)=0
 
virtual BaseHTMCheckpointPtrgetHtmCheckpointPtr ()=0
 
virtual void setHtmCheckpointPtr (BaseHTMCheckpointPtr cpt)=0
 
virtual ConstVecLane8 readVec8BitLaneReg (const RegId &reg) const =0
 Vector Register Lane Interfaces. More...
 
virtual ConstVecLane16 readVec16BitLaneReg (const RegId &reg) const =0
 Reads source vector 16bit operand. More...
 
virtual ConstVecLane32 readVec32BitLaneReg (const RegId &reg) const =0
 Reads source vector 32bit operand. More...
 
virtual ConstVecLane64 readVec64BitLaneReg (const RegId &reg) const =0
 Reads source vector 64bit operand. More...
 
virtual void setVecLane (const RegId &reg, const LaneData< LaneSize::Byte > &val)=0
 Write a lane of the destination vector register. More...
 
virtual void setVecLane (const RegId &reg, const LaneData< LaneSize::TwoByte > &val)=0
 
virtual void setVecLane (const RegId &reg, const LaneData< LaneSize::FourByte > &val)=0
 
virtual void setVecLane (const RegId &reg, const LaneData< LaneSize::EightByte > &val)=0
 
virtual RegVal readIntRegFlat (RegIndex idx) const =0
 Flat register interfaces. More...
 
virtual void setIntRegFlat (RegIndex idx, RegVal val)=0
 
virtual RegVal readFloatRegFlat (RegIndex idx) const =0
 
virtual void setFloatRegFlat (RegIndex idx, RegVal val)=0
 
virtual const VecRegContainerreadVecRegFlat (RegIndex idx) const =0
 
virtual VecRegContainergetWritableVecRegFlat (RegIndex idx)=0
 
virtual void setVecRegFlat (RegIndex idx, const VecRegContainer &val)=0
 
virtual const VecElemreadVecElemFlat (RegIndex idx, const ElemIndex &elemIdx) const =0
 
virtual void setVecElemFlat (RegIndex idx, const ElemIndex &elemIdx, const VecElem &val)=0
 
virtual const VecPredRegContainerreadVecPredRegFlat (RegIndex idx) const =0
 
virtual VecPredRegContainergetWritableVecPredRegFlat (RegIndex idx)=0
 
virtual void setVecPredRegFlat (RegIndex idx, const VecPredRegContainer &val)=0
 
virtual RegVal readCCRegFlat (RegIndex idx) const =0
 
virtual void setCCRegFlat (RegIndex idx, RegVal val)=0
 
- Public Member Functions inherited from PCEventScope
virtual bool remove (PCEvent *event)=0
 
virtual bool schedule (PCEvent *event)=0
 

Static Public Member Functions

static void compare (ThreadContext *one, ThreadContext *two)
 function to compare two thread contexts (for debugging) More...
 

Public Attributes

int intResult = DefaultIntResult
 
double floatResult = DefaultFloatResult
 
int intOffset = 0
 

Static Public Attributes

static const int ints []
 
static const double floats []
 
static const int DefaultIntResult = 0
 
static const double DefaultFloatResult = 0.0
 

Protected Types

typedef TheISA::MachInst MachInst
 
using VecRegContainer = TheISA::VecRegContainer
 
using VecElem = TheISA::VecElem
 
using VecPredRegContainer = TheISA::VecPredRegContainer
 

Detailed Description

ThreadContext is the external interface to all thread state for anything outside of the CPU.

It provides all accessor methods to state that might be needed by external objects, ranging from register values to things such as kernel stats. It is an abstract base class; the CPU can create its own ThreadContext by deriving from it.

The ThreadContext is slightly different than the ExecContext. The ThreadContext provides access to an individual thread's state; an ExecContext provides ISA access to the CPU (meaning it is implicitly multithreaded on SMT systems). Additionally the ThreadState is an abstract class that exactly defines the interface; the ExecContext is a more implicit interface that must be implemented so that the ISA can access whatever state it needs.

Definition at line 88 of file thread_context.hh.

Member Typedef Documentation

◆ MachInst

typedef TheISA::MachInst ThreadContext::MachInst
protected

Definition at line 91 of file thread_context.hh.

◆ VecElem

using ThreadContext::VecElem = TheISA::VecElem
protected

Definition at line 93 of file thread_context.hh.

◆ VecPredRegContainer

using ThreadContext::VecPredRegContainer = TheISA::VecPredRegContainer
protected

Definition at line 94 of file thread_context.hh.

◆ VecRegContainer

using ThreadContext::VecRegContainer = TheISA::VecRegContainer
protected

Definition at line 92 of file thread_context.hh.

Member Enumeration Documentation

◆ Status

Enumerator
Active 

Running.

Instructions should be executed only when the context is in this state.

Suspended 

Temporarily inactive.

Entered while waiting for synchronization, etc.

Halting 

Trying to exit and waiting for an event to completely exit.

Entered when target executes an exit syscall.

Halted 

Permanently shut down.

Entered when target executes m5exit pseudo-instruction. When all contexts enter this state, the simulation will terminate.

Definition at line 98 of file thread_context.hh.

Constructor & Destructor Documentation

◆ ~ThreadContext()

virtual ThreadContext::~ThreadContext ( )
inlinevirtual

Reimplemented in Iris::ThreadContext.

Definition at line 118 of file thread_context.hh.

Member Function Documentation

◆ activate()

virtual void ThreadContext::activate ( )
pure virtual

◆ clearArchRegs()

virtual void ThreadContext::clearArchRegs ( )
pure virtual

◆ compare()

void ThreadContext::compare ( ThreadContext one,
ThreadContext two 
)
static

◆ contextId()

virtual ContextID ThreadContext::contextId ( ) const
pure virtual

◆ copyArchRegs()

virtual void ThreadContext::copyArchRegs ( ThreadContext tc)
pure virtual

Implemented in SimpleThread, and CheckerThreadContext< TC >.

Referenced by takeOverFrom().

◆ cpuId()

virtual int ThreadContext::cpuId ( ) const
pure virtual

◆ descheduleInstCountEvent()

virtual void ThreadContext::descheduleInstCountEvent ( Event event)
pure virtual

◆ exit()

virtual int ThreadContext::exit ( )
inlinevirtual

Definition at line 302 of file thread_context.hh.

◆ flattenRegId()

virtual RegId ThreadContext::flattenRegId ( const RegId regId) const
pure virtual

◆ getCheckerCpuPtr()

virtual CheckerCPU* ThreadContext::getCheckerCpuPtr ( )
pure virtual

◆ getCpuPtr()

virtual BaseCPU* ThreadContext::getCpuPtr ( )
pure virtual

◆ getCurrentInstCount()

virtual Tick ThreadContext::getCurrentInstCount ( )
pure virtual

◆ getDecoderPtr()

virtual TheISA::Decoder* ThreadContext::getDecoderPtr ( )
pure virtual

◆ getDTBPtr()

virtual BaseTLB* ThreadContext::getDTBPtr ( )
pure virtual

◆ getHtmCheckpointPtr()

virtual BaseHTMCheckpointPtr& ThreadContext::getHtmCheckpointPtr ( )
pure virtual

◆ getIsaPtr()

virtual BaseISA* ThreadContext::getIsaPtr ( )
pure virtual

◆ getITBPtr()

virtual BaseTLB* ThreadContext::getITBPtr ( )
pure virtual

◆ getPhysProxy()

virtual PortProxy& ThreadContext::getPhysProxy ( )
pure virtual

◆ getProcessPtr()

virtual Process* ThreadContext::getProcessPtr ( )
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by _llseekFunc(), PowerISA::RemoteGDB::acc(), SparcISA::RemoteGDB::acc(), MipsISA::RemoteGDB::acc(), RiscvISA::RemoteGDB::acc(), X86ISA::RemoteGDB::acc(), ArmISA::RemoteGDB::acc(), acceptFunc(), accessFunc(), bindFunc(), brkFunc(), chdirFunc(), chmodFunc(), chownFunc(), cloneFunc(), closeFunc(), connectFunc(), dup2Func(), dupFunc(), eventfdFunc(), execveFunc(), exitImpl(), fallocateFunc(), fchmodFunc(), fchownFunc(), fcntl64Func(), fcntlFunc(), SETranslatingPortProxy::fixupAddr(), fstat64Func(), fstatat64Func(), fstatfsFunc(), fstatFunc(), ftruncate64Func(), ftruncateFunc(), futexFunc(), getcwdFunc(), getegidFunc(), geteuidFunc(), getgidFunc(), getpeernameFunc(), getpgrpFunc(), getpidFunc(), getppidFunc(), getsocknameFunc(), getsockoptFunc(), gettidFunc(), getuidFunc(), GenericPageTableFault::invoke(), SparcISA::FastInstructionAccessMMUMiss::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), SparcISA::SpillNNormal::invoke(), SparcISA::FillNNormal::invoke(), SparcISA::TrapInstruction::invoke(), X86ISA::PageFault::invoke(), ioctlFunc(), X86ISA::GpuTLB::issueTLBLookup(), linkFunc(), listenFunc(), lseekFunc(), lstat64Func(), lstatFunc(), X86ISA::m5PageFault(), mkdirFunc(), mknodFunc(), HSADriver::mmap(), Shader::mmap(), mmapFunc(), mremapFunc(), munmapFunc(), HSADriver::open(), openatFunc(), pipe2Func(), pollFunc(), pread64Func(), pwrite64Func(), readFunc(), readlinkFunc(), readvFunc(), recvfromFunc(), X86ISA::GpuTLB::CpuSidePort::recvFunctional(), recvmsgFunc(), BaseCPU::registerThreadContexts(), renameFunc(), rmdirFunc(), selectFunc(), sendmsgFunc(), ComputeUnit::sendRequest(), sendtoFunc(), setpgidFunc(), setsockoptFunc(), setThreadArea32Func(), setTidAddressFunc(), shutdownFunc(), socketFunc(), socketpairFunc(), stat64Func(), statfsFunc(), statFunc(), symlinkFunc(), sysinfoFunc(), takeOverFrom(), tgkillFunc(), X86ISA::TLB::translate(), RiscvISA::TLB::translate(), X86ISA::GpuTLB::translate(), MipsISA::TLB::translateAtomic(), PowerISA::TLB::translateData(), MipsISA::TLB::translateFunctional(), RiscvISA::TLB::translateFunctional(), X86ISA::TLB::translateFunctional(), PowerISA::TLB::translateFunctional(), SparcISA::TLB::translateFunctional(), PowerISA::TLB::translateInst(), ArmISA::TLB::translateSe(), X86ISA::GpuTLB::translationReturn(), truncate64Func(), truncateFunc(), SparcISA::unameFunc(), unameFunc(), unameFunc32(), unameFunc64(), unlinkFunc(), utimesFunc(), wait4Func(), writeFunc(), and writevFunc().

◆ getSystemPtr()

virtual System* ThreadContext::getSystemPtr ( )
pure virtual

◆ getVirtProxy()

virtual PortProxy& ThreadContext::getVirtProxy ( )
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by _llseekFunc(), acceptFunc(), accessFunc(), PseudoInst::addsymbol(), archPrctlFunc(), bindFunc(), chdirFunc(), chmodFunc(), chownFunc(), cloneFunc(), connectFunc(), Linux::ThreadInfo::curTaskInfo(), Linux::ThreadInfo::curTaskMmFromTaskStruct(), Linux::ThreadInfo::curTaskNameFromTaskStruct(), Linux::ThreadInfo::curTaskPIDFromTaskStruct(), Linux::ThreadInfo::curTaskStartFromTaskStruct(), Linux::ThreadInfo::curTaskTGIDFromTaskStruct(), execveFunc(), exitFutexWake(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), fstatat64Func(), futexFunc(), GuestABI::Argument< Aapcs32, Composite, typename std::enable_if< IsAapcs32Composite< Composite >::value >::type >::get(), Linux::ThreadInfo::get_data(), SparcISA::getArgument(), ArmISA::getArgument(), getcwdFunc(), gethostnameFunc(), getpeernameFunc(), SparcISA::getresuidFunc(), getsocknameFunc(), getsockoptFunc(), ArmLinuxProcess32::initState(), GPUComputeDriver::ioctl(), ioctlFunc(), linkFunc(), lstat64Func(), lstatFunc(), X86ISA::m5PageFault(), mkdirFunc(), mknodFunc(), openatFunc(), pipe2Func(), pollFunc(), ArmSemihosting::portProxy(), pread64Func(), Linux::printk(), pwrite64Func(), BaseRemoteGDB::read(), PseudoInst::readfile(), readFunc(), readlinkFunc(), Trace::TarmacParserRecord::readMemNoEffect(), readvFunc(), recvfromFunc(), recvmsgFunc(), renameFunc(), Process::replicatePage(), rmdirFunc(), sendmsgFunc(), sendtoFunc(), setsockoptFunc(), setThreadArea32Func(), setTLSFunc32(), socketpairFunc(), stat64Func(), statfsFunc(), statFunc(), symlinkFunc(), sysctlFunc(), timeFunc(), truncate64Func(), truncateFunc(), unlinkFunc(), utimesFunc(), wait4Func(), BaseRemoteGDB::write(), PseudoInst::writefile(), writeFunc(), and writevFunc().

◆ getWritableVecPredReg()

virtual VecPredRegContainer& ThreadContext::getWritableVecPredReg ( const RegId reg)
pure virtual

◆ getWritableVecPredRegFlat()

virtual VecPredRegContainer& ThreadContext::getWritableVecPredRegFlat ( RegIndex  idx)
pure virtual

◆ getWritableVecReg()

virtual VecRegContainer& ThreadContext::getWritableVecReg ( const RegId reg)
pure virtual

◆ getWritableVecRegFlat()

virtual VecRegContainer& ThreadContext::getWritableVecRegFlat ( RegIndex  idx)
pure virtual

◆ halt()

virtual void ThreadContext::halt ( )
pure virtual

Set the status to Halted.

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by exitImpl().

◆ htmAbortTransaction()

virtual void ThreadContext::htmAbortTransaction ( uint64_t  htm_uid,
HtmFailureFaultCause  cause 
)
pure virtual

◆ initMemProxies()

virtual void ThreadContext::initMemProxies ( ThreadContext tc)
pure virtual

Initialise the physical and virtual port proxies and tie them to the data port of the CPU.

tc ThreadContext for the virtual-to-physical translation

Implemented in SimpleThread, and CheckerThreadContext< TC >.

Referenced by BaseKvmCPU::init(), and MinorCPU::init().

◆ instAddr()

virtual Addr ThreadContext::instAddr ( ) const
pure virtual

◆ microPC()

virtual MicroPC ThreadContext::microPC ( ) const
pure virtual

◆ nextInstAddr()

virtual Addr ThreadContext::nextInstAddr ( ) const
pure virtual

◆ pcState() [1/2]

virtual TheISA::PCState ThreadContext::pcState ( ) const
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by ArmISA::ISA::addressTranslation(), ArmISA::ISA::addressTranslation64(), GenericISA::M5DebugFault::advancePC(), ArmISA::SoftwareStep::advanceSS(), MipsProcess::argsInit(), RiscvProcess::argsInit(), PowerProcess::argsInit(), ArmProcess::argsInit(), X86ISA::X86Process::argsInit(), Trace::SparcNativeTrace::check(), cloneFunc(), BaseRemoteGDB::cmd_async_cont(), BaseRemoteGDB::cmd_async_step(), BaseRemoteGDB::cmd_cont(), BaseRemoteGDB::cmd_step(), Minor::Execute::commit(), Minor::Execute::commitInst(), compare(), O3ThreadContext< Impl >::copyArchRegs(), PowerISA::copyRegs(), X86ISA::copyRegs(), RiscvISA::copyRegs(), ArmISA::copyRegs(), SparcISA::copyRegs(), MipsISA::copyRegs(), ArmISA::copyVecRegs(), SparcISA::doNormalFault(), SparcISA::doREDFault(), Minor::Execute::executeMemRefInst(), execveFunc(), PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), SparcProcess::handleTrap(), X86ISA::FsWorkload::initState(), FullO3CPU< O3CPUImpl >::insertThread(), FaultBase::invoke(), X86ISA::X86FaultBase::invoke(), SparcISA::SparcFaultBase::invoke(), SESyscallFault::invoke(), ReExec::invoke(), MipsISA::MipsFaultBase::invoke(), X86ISA::X86Trap::invoke(), SparcISA::PowerOnReset::invoke(), SyscallRetryFault::invoke(), RiscvISA::RiscvFault::invoke(), RiscvISA::Reset::invoke(), MipsISA::ResetFault::invoke(), ArmISA::ArmFault::invoke(), SparcISA::SpillNNormal::invoke(), MipsISA::TlbFault< TlbInvalidFault >::invoke(), SparcISA::FillNNormal::invoke(), SparcISA::TrapInstruction::invoke(), X86ISA::PageFault::invoke(), ArmISA::Reset::invoke(), ArmISA::SupervisorCall::invoke(), X86ISA::InitInterrupt::invoke(), X86ISA::StartupInterrupt::invoke(), ArmISA::ArmFault::invoke64(), RiscvISA::RiscvFault::invokeSE(), RiscvISA::UnknownInstFault::invokeSE(), RiscvISA::IllegalInstFault::invokeSE(), RiscvISA::UnimplementedFault::invokeSE(), RiscvISA::IllegalFrmFault::invokeSE(), ioctlFunc(), mmapFunc(), SkipFuncBase::process(), PseudoInst::pseudoInstWork(), Trace::TarmacParserRecord::readMemNoEffect(), ArmISA::ISA::readMiscReg(), ArmISA::HTMCheckpoint::restore(), ArmISA::SkipFunc::returnFromFuncIn(), ArmISA::HTMCheckpoint::save(), serialize(), MipsISA::MipsFaultBase::setExceptionState(), RiscvISA::ISA::setMiscReg(), ArmISA::ISA::setMiscReg(), setNPC(), PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARCGdbRegCache::setRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), X86ISA::I386LinuxProcess::syscall(), Minor::Execute::takeInterrupt(), ArmISA::SelfDebug::testBreakPoints(), BaseRemoteGDB::trap(), Minor::Execute::tryPCEvents(), Minor::Execute::tryToBranch(), unserialize(), Trace::X86NativeTrace::ThreadState::update(), Trace::ArmNativeTrace::ThreadState::update(), ArmKvmCPU::updateTCStateCore(), ArmV8KvmCPU::updateThreadContext(), X86KvmCPU::updateThreadContextRegs(), and Minor::Fetch1::wakeupFetch().

◆ pcState() [2/2]

virtual void ThreadContext::pcState ( const TheISA::PCState &  val)
pure virtual

◆ pcStateNoRecord()

virtual void ThreadContext::pcStateNoRecord ( const TheISA::PCState &  val)
pure virtual

◆ quiesce()

void ThreadContext::quiesce ( )

Quiesce thread context.

Definition at line 129 of file thread_context.cc.

References contextId(), getSystemPtr(), System::Threads::quiesce(), and System::threads.

Referenced by PseudoInst::quiesce(), and DistIface::toggleSync().

◆ quiesceTick()

void ThreadContext::quiesceTick ( Tick  resume)

◆ readCCReg()

virtual RegVal ThreadContext::readCCReg ( RegIndex  reg_idx) const
pure virtual

◆ readCCRegFlat()

virtual RegVal ThreadContext::readCCRegFlat ( RegIndex  idx) const
pure virtual

◆ readFloatReg()

virtual RegVal ThreadContext::readFloatReg ( RegIndex  reg_idx) const
pure virtual

◆ readFloatRegFlat()

virtual RegVal ThreadContext::readFloatRegFlat ( RegIndex  idx) const
pure virtual

◆ readFuncExeInst()

virtual Counter ThreadContext::readFuncExeInst ( ) const
pure virtual

◆ readIntReg()

virtual RegVal ThreadContext::readIntReg ( RegIndex  reg_idx) const
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by PowerISA::BranchRegCond::branchTarget(), ArmSemihosting::call32(), ArmSemihosting::call64(), Trace::SparcNativeTrace::check(), compare(), PowerISA::copyRegs(), RiscvISA::copyRegs(), SparcISA::copyRegs(), SparcISA::doNormalFault(), SparcISA::doREDFault(), TimingExprReadIntReg::eval(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), GuestABI::Argument< X86PseudoInstABI, uint64_t >::get(), GuestABI::Argument< ABI, Arg, typename std::enable_if< std::is_base_of< GenericSyscallABI64, ABI >::value &&std::is_integral< Arg >::value >::type >::get(), GuestABI::Argument< ABI, Arg, typename std::enable_if<!ABI::template IsWide< Arg >::value >::type >::get(), GuestABI::enable_if< std::is_integral< Integer >::value &&(sizeof(Integer)<=sizeof(uint32_t)) >::type >::get(), GuestABI::Argument< ABI, Arg, Enabled >::type >< Integer >::get(), GuestABI::enable_if< std::is_integral< Integer >::value &&(sizeof(Integer)<=8) >::type >::get(), GuestABI::Argument< Aapcs32, Composite, typename std::enable_if< IsAapcs32Composite< Composite >::value >::type >::get(), GuestABI::Argument< Aapcs64, Composite, typename std::enable_if< IsAapcs64Composite< Composite >::value &&!IsAapcs64Hxa< Composite >::value >::type >::get(), SparcISA::getArgument(), X86ISA::getArgument(), ArmISA::getArgument(), RiscvISA::getArgument(), PowerISA::RemoteGDB::PowerGdbRegCache::getRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), ArmISA::DumpStats::getTaskDetails(), ArmISA::DumpStats64::getTaskDetails(), ArmISA::ArmFault::invoke(), GenericSyscallABI32::mergeRegs(), GuestABI::Result< Aapcs32, Composite, typename std::enable_if< IsAapcs32Composite< Composite >::value >::type >::prepare(), ArmISA::ISA::readMiscReg(), MipsISA::readRegOtherThread(), ArmISA::SkipFunc::returnFromFuncIn(), ArmISA::HTMCheckpoint::save(), GuestABI::Result< PowerProcess::SyscallABI, SyscallReturn >::store(), GuestABI::Result< ABI, SyscallReturn, typename std::enable_if< std::is_base_of< SparcProcess::SyscallABI, ABI >::value >::type >::store(), GuestABI::Result< Aapcs64, Composite, typename std::enable_if< IsAapcs64Composite< Composite >::value &&!IsAapcs64Hxa< Composite >::value >::type >::store(), PowerLinuxProcess::syscall(), SparcISA::SparcSolarisProcess::syscall(), MipsLinuxProcess::syscall(), RiscvLinuxProcess64::syscall(), X86ISA::X86_64LinuxProcess::syscall(), SparcISA::Sparc32LinuxProcess::syscall(), X86ISA::I386LinuxProcess::syscall(), SparcISA::Sparc64LinuxProcess::syscall(), RiscvLinuxProcess32::syscall(), ArmFreebsdProcess32::syscall(), ArmLinuxProcess32::syscall(), ArmLinuxProcess64::syscall(), ArmFreebsdProcess64::syscall(), Trace::X86NativeTrace::ThreadState::update(), Trace::ArmNativeTrace::ThreadState::update(), Trace::TarmacTracerRecord::TraceRegEntry::updateInt(), and ArmV8KvmCPU::updateKvmState().

◆ readIntRegFlat()

virtual RegVal ThreadContext::readIntRegFlat ( RegIndex  idx) const
pure virtual

Flat register interfaces.

Some architectures have different registers visible in different modes. Such architectures "flatten" a register (see flattenRegId()) to map it into the gem5 register file. This interface provides a flat interface to the underlying register file, which allows for example serialization code to access all registers.

Implemented in SimpleThread, CheckerThreadContext< TC >, Iris::ThreadContext, and FastModel::CortexA76TC.

Referenced by X86ISA::copyRegs(), ArmISA::copyRegs(), MipsISA::copyRegs(), FastModel::CortexA76TC::readIntRegFlat(), serialize(), and ArmKvmCPU::updateKvmStateCore().

◆ readLastActivate()

virtual Tick ThreadContext::readLastActivate ( )
pure virtual

◆ readLastSuspend()

virtual Tick ThreadContext::readLastSuspend ( )
pure virtual

◆ readMiscReg()

virtual RegVal ThreadContext::readMiscReg ( RegIndex  misc_reg)
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by ArmISA::AArch32isUndefinedGenericTimer(), RiscvISA::RemoteGDB::acc(), ArmISA::addPAC(), ArmISA::addPACDA(), ArmISA::addPACDB(), ArmISA::addPACGA(), ArmISA::addPACIA(), ArmISA::addPACIB(), ArmISA::VectorCatch::addressMatching(), ArmProcess64::armHwcapImpl(), ArmISA::authDA(), ArmISA::authDB(), ArmISA::authIA(), ArmISA::authIB(), MipsISA::MipsFaultBase::base(), ArmISA::calculateBottomPACBit(), ArmISA::calculateTBI(), ArmISA::canReadAArch64SysReg(), ArmISA::canWriteAArch64SysReg(), ArmISA::ArmStaticInst::checkAdvSIMDOrFPEnabled32(), MiscRegOp64::checkEL1Trap(), MiscRegOp64::checkEL2Trap(), MiscRegOp64::checkEL3Trap(), ArmISA::ArmStaticInst::checkFPAdvSIMDTrap64(), ArmISA::Interrupts::checkInterrupts(), ArmISA::TLB::checkPAN(), ArmISA::ArmStaticInst::checkSveEnabled(), ArmISA::computeAddrTop(), ArmISA::condGenericTimerCommonEL0SystemAccessTrapEL2(), ArmISA::condGenericTimerCommonEL1SystemAccessTrapEL2(), ArmISA::condGenericTimerPhysEL1SystemAccessTrapEL2(), ArmISA::condGenericTimerPhysHypTrap(), ArmISA::condGenericTimerSystemAccessTrapEL1(), X86ISA::copyMiscRegs(), ArmISA::debugTargetFrom(), SparcISA::TLB::doMmuRegRead(), SparcISA::TLB::doMmuRegWrite(), RiscvISA::TLB::doTranslate(), ArmKvmCPU::dumpKvmStateCoProc(), ArmISA::PrefetchAbort::ec(), ArmISA::DataAbort::ec(), ArmISA::EL2Enabled(), ArmISA::ELIsInHost(), ArmISA::ELStateUsingAArch32K(), ArmISA::VectorCatch::exceptionTrapping(), MiscRegImplDefined64::execute(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), SparcISA::RemoteGDB::gdbRegs(), ArmISA::ArmStaticInst::generalExceptionsToAArch64(), ArmISA::BrkPoint::getAddrfromReg(), ArmISA::WatchPoint::getAddrfromReg(), ArmISA::BrkPoint::getContextfromReg(), ArmISA::BrkPoint::getControlReg(), ArmISA::getExecutingAsid(), ArmISA::Interrupts::getInterrupt(), RiscvISA::TLB::getMemPriv(), SparcISA::RemoteGDB::SPARCGdbRegCache::getRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::getRegs(), ArmISA::getRestoredITBits(), ArmISA::ArmFault::getVector(), ArmISA::Reset::getVector(), ArmISA::ArmFault::getVector64(), ArmISA::VectorCatch::getVectorBase(), ArmISA::BrkPoint::getVMIDfromReg(), RiscvISA::Interrupts::globalMask(), ArmISA::HavePACExt(), ArmISA::HaveSecureEL2Ext(), ArmISA::HaveVirtHostExt(), ArmISA::illegalExceptionReturn(), ArmISA::inAArch64(), ArmISA::SelfDebug::init(), ArmProcess32::initState(), ArmProcess64::initState(), MipsISA::inUserMode(), RiscvISA::RiscvFault::invoke(), RiscvISA::Reset::invoke(), MipsISA::CoprocessorUnusableFault::invoke(), ArmISA::ArmFault::invoke(), ArmISA::Reset::invoke(), X86ISA::InitInterrupt::invoke(), X86ISA::StartupInterrupt::invoke(), ArmISA::AbortFault< DataAbort >::invoke(), ArmISA::ArmFault::invoke64(), ArmISA::SelfDebug::isDebugEnabled(), ArmISA::SelfDebug::isDebugEnabledForEL32(), ArmISA::isGenericTimerCommonEL0HypTrap(), ArmISA::isGenericTimerCommonEL0SystemAccessTrapEL2(), ArmISA::isGenericTimerPhysEL0SystemAccessTrapEL2(), ArmISA::isGenericTimerPhysEL1SystemAccessTrapEL2(), ArmISA::isGenericTimerSystemAccessTrapEL1(), ArmISA::isGenericTimerSystemAccessTrapEL3(), ArmISA::isGenericTimerVirtSystemAccessTrapEL2(), ArmISA::isSecure(), ArmISA::isSecureBelowEL3(), ArmISA::IsSecureEL2Enabled(), ArmISA::isUnpriviledgeAccess(), ArmISA::ArmStaticInst::isWFxTrapping(), X86KvmCPU::kvmRunWrapper(), ArmISA::longDescFormatInUse(), X86ISA::m5PageFault(), ArmISA::mcrMrc15TrapToHyp(), ArmISA::mcrrMrrc15TrapToHyp(), ArmISA::TableWalker::memAttrs(), ArmISA::TableWalker::memAttrsAArch64(), ArmISA::TableWalker::memAttrsLPAE(), ArmISA::ArmFaultVals< FastInterrupt >::offset(), MipsISA::TlbRefillFault::offset(), ArmISA::TLBIALL::operator()(), ArmISA::TLBIASID::operator()(), ArmISA::TLBIMVAA::operator()(), ArmISA::TLBIMVA::operator()(), ArmISA::TableWalker::processWalk(), ArmISA::TableWalker::processWalkAArch64(), ArmISA::TableWalker::processWalkLPAE(), ArmISA::purifyTaggedAddr(), ArmISA::readMPIDR(), MipsISA::readRegOtherThread(), ArmISA::s1TranslationRegime(), ArmISA::HTMCheckpoint::save(), ArmISA::sendEvent(), Iris::Interrupts::serialize(), MipsISA::MipsFaultBase::setExceptionState(), ArmISA::ISA::setMiscReg(), MipsISA::TlbFault< TlbInvalidFault >::setTlbExceptionState(), ArmISA::snsBankedIndex(), ArmISA::snsBankedIndex64(), ArmISA::ArmStaticInst::softwareBreakpoint32(), ArmISA::SPAlignmentCheckEnabled(), ArmV8KvmCPU::startup(), ArmISA::stripPAC(), ArmISA::Interrupts::takeInt(), ArmISA::WatchPoint::test(), ArmISA::BrkPoint::testAddrMatch(), ArmISA::BrkPoint::testAddrMissMatch(), ArmISA::BrkPoint::testContextMatch(), ArmISA::BrkPoint::testVMIDMatch(), RiscvISA::TLB::translate(), RiscvISA::TLB::translateFunctional(), ArmISA::TLB::translateMmuOff(), Trace::ArmNativeTrace::ThreadState::update(), ArmISA::ArmFault::update(), ArmV8KvmCPU::updateKvmState(), ArmKvmCPU::updateKvmStateCore(), updateKvmStateFPUCommon(), X86KvmCPU::updateKvmStateMSRs(), X86KvmCPU::updateKvmStateRegs(), X86KvmCPU::updateKvmStateSRegs(), ArmKvmCPU::updateKvmStateVFP(), ArmISA::TLB::updateMiscReg(), ArmISA::upperAndLowerRange(), and ArmISA::TableWalker::walk().

◆ readMiscRegNoEffect()

virtual RegVal ThreadContext::readMiscRegNoEffect ( RegIndex  misc_reg) const
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by ArmISA::AbortFault< DataAbort >::abortDisable(), ArmISA::Interrupt::abortDisable(), ArmISA::FastInterrupt::abortDisable(), archPrctlFunc(), MipsISA::Interrupts::checkInterrupts(), SparcISA::Interrupts::checkInterrupts(), ArmISA::ArmStaticInst::checkSETENDEnabled(), compare(), ArmISA::condGenericTimerCommonEL1SystemAccessTrapEL2(), SparcISA::copyMiscRegs(), X86ISA::copyMiscRegs(), ArmISA::copyRegs(), SparcISA::copyRegs(), MipsISA::copyRegs(), ArmISA::currOpMode(), ArmISA::debugTargetFrom(), SparcISA::doNormalFault(), SparcISA::doREDFault(), ArmKvmCPU::dumpKvmStateCoProc(), SparcISA::enterREDState(), X86ISA::TLB::finalizePhysical(), ArmISA::FastInterrupt::fiqDisable(), X86ISA::RemoteGDB::gdbRegs(), MipsISA::getCauseIP(), SparcISA::getExecutingAsid(), SparcISA::getHyperVector(), MipsISA::Interrupts::getInterrupt(), SparcISA::Interrupts::getInterrupt(), SparcISA::getPrivVector(), MipsISA::RemoteGDB::MipsGdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::getRegs(), X86ISA::RemoteGDB::X86GdbRegCache::getRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::getRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::getRegs(), X86ISA::getRFlags(), ArmISA::ArmFault::getVector(), ArmISA::Reset::getVector(), X86KvmCPU::handleIOMiscReg32(), X86KvmCPU::handleKvmExitIO(), ArmISA::SelfDebug::init(), X86ISA::FsWorkload::initState(), MipsISA::Interrupts::interruptsPending(), SparcISA::inUserMode(), X86ISA::inUserMode(), ArmISA::inUserMode(), SparcISA::SparcFaultBase::invoke(), X86ISA::X86FaultBase::invoke(), SparcISA::PowerOnReset::invoke(), MipsISA::ResetFault::invoke(), SparcISA::FastInstructionAccessMMUMiss::invoke(), ArmISA::ArmFault::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), X86ISA::PageFault::invoke(), ArmISA::VirtualDataAbort::invoke(), ArmISA::isBigEndian64(), MipsISA::InterruptFault::offset(), MipsISA::Interrupts::onCpuTimerInterrupt(), X86ISA::GpuTLB::pagingProtectionChecks(), ArmISA::UndefinedInstruction::routeToHyp(), ArmISA::SupervisorCall::routeToHyp(), ArmISA::SupervisorTrap::routeToHyp(), ArmISA::PrefetchAbort::routeToHyp(), ArmISA::DataAbort::routeToHyp(), ArmISA::Interrupt::routeToHyp(), ArmISA::FastInterrupt::routeToHyp(), ArmISA::PCAlignmentFault::routeToHyp(), ArmISA::SPAlignmentFault::routeToHyp(), ArmISA::SystemError::routeToHyp(), ArmISA::SoftwareBreakpoint::routeToHyp(), ArmISA::HardwareBreakpoint::routeToHyp(), ArmISA::Watchpoint::routeToHyp(), ArmISA::SoftwareStepFault::routeToHyp(), ArmISA::IllegalInstSetStateFault::routeToHyp(), ArmISA::PrefetchAbort::routeToMonitor(), ArmISA::DataAbort::routeToMonitor(), ArmISA::Interrupt::routeToMonitor(), ArmISA::FastInterrupt::routeToMonitor(), ArmISA::SystemError::routeToMonitor(), Iris::ISA::serialize(), Iris::Interrupts::serialize(), MipsISA::setCauseIP(), setKvmDTableReg(), setKvmSegmentReg(), ArmISA::ISA::setMiscReg(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), GuestABI::Result< ABI, SyscallReturn, typename std::enable_if< std::is_base_of< SparcProcess::SyscallABI, ABI >::value >::type >::store(), X86ISA::GpuTLB::tlbLookup(), X86ISA::TLB::translate(), X86ISA::GpuTLB::translate(), SparcISA::TLB::translateData(), SparcISA::TLB::translateFunctional(), SparcISA::TLB::translateInst(), X86ISA::TLB::translateInt(), X86ISA::GpuTLB::translateInt(), Trace::ArmNativeTrace::ThreadState::update(), ArmISA::ArmFault::update(), Trace::TarmacTracerRecord::TraceRegEntry::updateInt(), ArmKvmCPU::updateKvmStateCoProc(), updateKvmStateFPUCommon(), X86KvmCPU::updateKvmStateFPULegacy(), X86KvmCPU::updateKvmStateFPUXSave(), Trace::TarmacTracerRecord::TraceRegEntry::updateMisc(), and ArmKvmCPU::updateTCStateCore().

◆ readStCondFailures()

virtual unsigned ThreadContext::readStCondFailures ( ) const
pure virtual

◆ readVec16BitLaneReg()

virtual ConstVecLane16 ThreadContext::readVec16BitLaneReg ( const RegId reg) const
pure virtual

Reads source vector 16bit operand.

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ readVec32BitLaneReg()

virtual ConstVecLane32 ThreadContext::readVec32BitLaneReg ( const RegId reg) const
pure virtual

Reads source vector 32bit operand.

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ readVec64BitLaneReg()

virtual ConstVecLane64 ThreadContext::readVec64BitLaneReg ( const RegId reg) const
pure virtual

Reads source vector 64bit operand.

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ readVec8BitLaneReg()

virtual ConstVecLane8 ThreadContext::readVec8BitLaneReg ( const RegId reg) const
pure virtual

Vector Register Lane Interfaces.

Reads source vector 8bit operand.

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ readVecElem()

virtual const VecElem& ThreadContext::readVecElem ( const RegId reg) const
pure virtual

◆ readVecElemFlat()

virtual const VecElem& ThreadContext::readVecElemFlat ( RegIndex  idx,
const ElemIndex elemIdx 
) const
pure virtual

◆ readVecPredReg()

virtual const VecPredRegContainer& ThreadContext::readVecPredReg ( const RegId reg) const
pure virtual

◆ readVecPredRegFlat()

virtual const VecPredRegContainer& ThreadContext::readVecPredRegFlat ( RegIndex  idx) const
pure virtual

◆ readVecReg()

virtual const VecRegContainer& ThreadContext::readVecReg ( const RegId reg) const
pure virtual

◆ readVecRegFlat()

virtual const VecRegContainer& ThreadContext::readVecRegFlat ( RegIndex  idx) const
pure virtual

◆ regStats()

virtual void ThreadContext::regStats ( const std::string &  name)
inlinevirtual

Reimplemented in Iris::ThreadContext, and CheckerThreadContext< TC >.

Definition at line 183 of file thread_context.hh.

Referenced by CheckerThreadContext< TC >::regStats().

◆ scheduleInstCountEvent()

virtual void ThreadContext::scheduleInstCountEvent ( Event event,
Tick  count 
)
pure virtual

◆ setCCReg()

virtual void ThreadContext::setCCReg ( RegIndex  reg_idx,
RegVal  val 
)
pure virtual

◆ setCCRegFlat()

virtual void ThreadContext::setCCRegFlat ( RegIndex  idx,
RegVal  val 
)
pure virtual

◆ setContextId()

virtual void ThreadContext::setContextId ( ContextID  id)
pure virtual

◆ setFloatReg()

virtual void ThreadContext::setFloatReg ( RegIndex  reg_idx,
RegVal  val 
)
pure virtual

◆ setFloatRegFlat()

virtual void ThreadContext::setFloatRegFlat ( RegIndex  idx,
RegVal  val 
)
pure virtual

◆ setHtmCheckpointPtr()

virtual void ThreadContext::setHtmCheckpointPtr ( BaseHTMCheckpointPtr  cpt)
pure virtual

◆ setIntReg()

virtual void ThreadContext::setIntReg ( RegIndex  reg_idx,
RegVal  val 
)
pure virtual

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by X86Linux::archClone(), RiscvLinux64::archClone(), SparcLinux::archClone(), ArmLinux32::archClone(), RiscvLinux32::archClone(), ArmLinux64::archClone(), RiscvProcess::argsInit(), MipsProcess::argsInit(), PowerProcess::argsInit(), ArmProcess::argsInit(), X86ISA::X86Process::argsInit(), cloneFunc(), PowerISA::copyRegs(), RiscvISA::copyRegs(), SparcISA::copyRegs(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), SparcProcess::initState(), X86ISA::X86FaultBase::invoke(), ArmISA::ArmFault::invoke(), X86ISA::InitInterrupt::invoke(), ArmISA::HTMCheckpoint::restore(), ArmISA::ISA::setMiscReg(), MipsISA::setRegOtherThread(), PowerISA::RemoteGDB::PowerGdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARCGdbRegCache::setRegs(), RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs(), MipsISA::RemoteGDB::MipsGdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), SparcISA::RemoteGDB::SPARC64GdbRegCache::setRegs(), ArmISA::RemoteGDB::AArch64GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), GuestABI::Result< X86PseudoInstABI, T >::store(), GuestABI::Result< ABI, SyscallReturn, typename std::enable_if< std::is_base_of< ArmFreebsdProcessBits::SyscallABI, ABI >::value >::type >::store(), GuestABI::Result< ABI, SyscallReturn, typename std::enable_if< std::is_base_of< ArmLinuxProcessBits::SyscallABI, ABI >::value >::type >::store(), GuestABI::Result< MipsProcess::SyscallABI, SyscallReturn >::store(), GuestABI::Result< PowerProcess::SyscallABI, SyscallReturn >::store(), GuestABI::Result< RiscvProcess::SyscallABI, SyscallReturn >::store(), GuestABI::Result< ABI, SyscallReturn, typename std::enable_if< std::is_base_of< X86Linux::SyscallABI, ABI >::value >::type >::store(), GuestABI::Result< ABI, SyscallReturn, typename std::enable_if< std::is_base_of< SparcProcess::SyscallABI, ABI >::value >::type >::store(), GuestABI::enable_if< std::is_integral< Integer >::value &&(sizeof(Integer)< sizeof(uint32_t)) >::type >::store(), GuestABI::Result< Aapcs32, Integer, typename std::enable_if< std::is_integral< Integer >::value &&(sizeof(Integer)==sizeof(uint32_t)) >::type >::store(), GuestABI::Result< Aapcs32, Integer, typename std::enable_if< std::is_integral< Integer >::value &&(sizeof(Integer)==sizeof(uint64_t)) >::type >::store(), GuestABI::enable_if< std::is_integral< Integer >::value &&(sizeof(Integer)<=8) >::type >::store(), GuestABI::Result< ABI, Ret, Enabled >::type >< Integer >::store(), GuestABI::Result< Aapcs32, Composite, typename std::enable_if< IsAapcs32Composite< Composite >::value >::type >::store(), GuestABI::Result< Aapcs64, Composite, typename std::enable_if< IsAapcs64Composite< Composite >::value &&!IsAapcs64Hxa< Composite >::value >::type >::store(), GuestABI::Result< ArmSemihosting::Abi32, ArmSemihosting::RetErrno >::store(), GuestABI::Result< ArmSemihosting::Abi64, ArmSemihosting::RetErrno >::store(), and ArmV8KvmCPU::updateThreadContext().

◆ setIntRegFlat()

virtual void ThreadContext::setIntRegFlat ( RegIndex  idx,
RegVal  val 
)
pure virtual

◆ setMiscReg()

virtual void ThreadContext::setMiscReg ( RegIndex  misc_reg,
RegVal  val 
)
pure virtual

Implemented in SimpleThread, CheckerThreadContext< TC >, and Iris::ThreadContext.

Referenced by ArmLinux::archClone(), SparcLinux::archClone(), SparcISA::copyMiscRegs(), X86ISA::copyMiscRegs(), ArmISA::copyRegs(), SparcISA::copyRegs(), SparcISA::TLB::doMmuRegWrite(), SparcISA::doNormalFault(), SparcISA::doREDFault(), SparcISA::enterREDState(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), X86KvmCPU::handleIOMiscReg32(), SparcProcess::initState(), ArmProcess32::initState(), X86ISA::FsWorkload::initState(), ArmProcess64::initState(), X86ISA::X86_64Process::initState(), Sparc32Process::initState(), X86ISA::I386Process::initState(), Sparc64Process::initState(), X86ISA::installSegDesc(), SparcISA::PowerOnReset::invoke(), RiscvISA::RiscvFault::invoke(), RiscvISA::Reset::invoke(), MipsISA::ResetFault::invoke(), ArmISA::ArmFault::invoke(), X86ISA::PageFault::invoke(), ArmISA::Reset::invoke(), X86ISA::InitInterrupt::invoke(), X86ISA::StartupInterrupt::invoke(), ArmISA::AbortFault< DataAbort >::invoke(), ArmISA::PCAlignmentFault::invoke(), ArmISA::HardwareBreakpoint::invoke(), ArmISA::Watchpoint::invoke(), ArmISA::ArmSev::invoke(), ArmISA::ArmFault::invoke64(), X86KvmCPU::kvmRunWrapper(), ArmISA::HTMCheckpoint::restore(), Iris::Interrupts::serialize(), setContextSegment(), GenericTimer::setMiscReg(), ArmISA::ISA::setMiscReg(), MipsISA::setRegOtherThread(), ArmISA::RemoteGDB::AArch32GdbRegCache::setRegs(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), X86ISA::setRFlags(), ArmISA::ArmFault::setSyndrome(), setTLSFunc32(), setTLSFunc64(), ArmKvmCPU::updateTCStateCore(), ArmKvmCPU::updateTCStateVFP(), ArmV8KvmCPU::updateThreadContext(), X86KvmCPU::updateThreadContext(), and X86KvmCPU::updateThreadContextMSRs().

◆ setMiscRegNoEffect()

virtual void ThreadContext::setMiscRegNoEffect ( RegIndex  misc_reg,
RegVal  val 
)
pure virtual

◆ setNPC()

void ThreadContext::setNPC ( Addr  val)
inline

Definition at line 263 of file thread_context.hh.

References pcState(), and X86ISA::val.

Referenced by execveFunc(), and CheckerThreadContext< TC >::setNPC().

◆ setProcessPtr()

virtual void ThreadContext::setProcessPtr ( Process p)
pure virtual

◆ setStatus()

virtual void ThreadContext::setStatus ( Status  new_status)
pure virtual

◆ setStCondFailures()

virtual void ThreadContext::setStCondFailures ( unsigned  sc_failures)
pure virtual

◆ setThreadId()

virtual void ThreadContext::setThreadId ( int  id)
pure virtual

◆ setVecElem()

virtual void ThreadContext::setVecElem ( const RegId reg,
const VecElem val 
)
pure virtual

◆ setVecElemFlat()

virtual void ThreadContext::setVecElemFlat ( RegIndex  idx,
const ElemIndex elemIdx,
const VecElem val 
)
pure virtual

◆ setVecLane() [1/4]

virtual void ThreadContext::setVecLane ( const RegId reg,
const LaneData< LaneSize::Byte > &  val 
)
pure virtual

Write a lane of the destination vector register.

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

◆ setVecLane() [2/4]

virtual void ThreadContext::setVecLane ( const RegId reg,
const LaneData< LaneSize::EightByte > &  val 
)
pure virtual

◆ setVecLane() [3/4]

virtual void ThreadContext::setVecLane ( const RegId reg,
const LaneData< LaneSize::FourByte > &  val 
)
pure virtual

◆ setVecLane() [4/4]

virtual void ThreadContext::setVecLane ( const RegId reg,
const LaneData< LaneSize::TwoByte > &  val 
)
pure virtual

◆ setVecPredReg()

virtual void ThreadContext::setVecPredReg ( const RegId reg,
const VecPredRegContainer val 
)
pure virtual

◆ setVecPredRegFlat()

virtual void ThreadContext::setVecPredRegFlat ( RegIndex  idx,
const VecPredRegContainer val 
)
pure virtual

◆ setVecReg()

virtual void ThreadContext::setVecReg ( const RegId reg,
const VecRegContainer val 
)
pure virtual

◆ setVecRegFlat()

virtual void ThreadContext::setVecRegFlat ( RegIndex  idx,
const VecRegContainer val 
)
pure virtual

◆ socketId()

virtual uint32_t ThreadContext::socketId ( ) const
pure virtual

◆ status()

virtual Status ThreadContext::status ( ) const
pure virtual

◆ suspend()

virtual void ThreadContext::suspend ( )
pure virtual

Set the status to Suspended.

Implemented in SimpleThread, Iris::ThreadContext, and CheckerThreadContext< TC >.

Referenced by FutexMap::suspend_bitset().

◆ syscall()

virtual void ThreadContext::syscall ( )
pure virtual

◆ takeOverFrom()

virtual void ThreadContext::takeOverFrom ( ThreadContext old_context)
pure virtual

◆ threadId()

virtual int ThreadContext::threadId ( ) const
pure virtual

Member Data Documentation

◆ DefaultFloatResult

const double ThreadContext::DefaultFloatResult = 0.0
static

Definition at line 43 of file guest_abi.test.cc.

Referenced by TEST().

◆ DefaultIntResult

const int ThreadContext::DefaultIntResult = 0
static

Definition at line 42 of file guest_abi.test.cc.

Referenced by TEST().

◆ floatResult

double ThreadContext::floatResult = DefaultFloatResult

◆ floats

const double ThreadContext::floats
static

◆ intOffset

int ThreadContext::intOffset = 0

Definition at line 48 of file guest_abi.test.cc.

Referenced by TEST(), and testTcInit().

◆ intResult

int ThreadContext::intResult = DefaultIntResult

◆ ints

const int ThreadContext::ints
static

The documentation for this class was generated from the following files:

Generated on Wed Sep 30 2020 14:02:33 for gem5 by doxygen 1.8.17