#include <thread_context.hh>

Inheritance diagram for FastModel::CortexA76TC:

Public Member Functions
	CortexA76TC (::BaseCPU cpu, int id, System system, ::BaseTLB dtb, ::BaseTLB itb, ::BaseISA isa, iris::IrisConnectionInterface iris_if, const std::string &iris_path)

bool	translateAddress (Addr &paddr, Addr vaddr) override

void	initFromIrisInstance (const ResourceMap &resources) override

RegVal	readIntRegFlat (RegIndex idx) const override
	Flat register interfaces. More...

void	setIntRegFlat (RegIndex idx, RegVal val) override

RegVal	readCCRegFlat (RegIndex idx) const override

void	setCCRegFlat (RegIndex idx, RegVal val) override

const std::vector< iris::MemorySpaceId > &	getBpSpaceIds () const override

Public Member Functions inherited from Iris::ThreadContext
	ThreadContext (::BaseCPU cpu, int id, System system, ::BaseTLB dtb, ::BaseTLB itb, ::BaseISA isa, iris::IrisConnectionInterface iris_if, const std::string &iris_path)

virtual	~ThreadContext ()

bool	schedule (PCEvent *e) override

bool	remove (PCEvent *e) override

void	scheduleInstCountEvent (Event *event, Tick count) override

void	descheduleInstCountEvent (Event *event) override

Tick	getCurrentInstCount () override

::BaseCPU *	getCpuPtr () override

int	cpuId () const override

uint32_t	socketId () const override

int	threadId () const override

void	setThreadId (int id) override

int	contextId () const override

void	setContextId (int id) override

BaseTLB *	getITBPtr () override

BaseTLB *	getDTBPtr () override

CheckerCPU *	getCheckerCpuPtr () override

ArmISA::Decoder *	getDecoderPtr () override

System *	getSystemPtr () override

BaseISA *	getIsaPtr () override

PortProxy &	getPhysProxy () override

PortProxy &	getVirtProxy () override

void	initMemProxies (::ThreadContext *tc) override

Process *	getProcessPtr () override

void	setProcessPtr (Process *p) override

Status	status () const override

void	setStatus (Status new_status) override

void	activate () override
	Set the status to Active. More...

void	suspend () override
	Set the status to Suspended. More...

void	halt () override
	Set the status to Halted. More...

void	takeOverFrom (::ThreadContext *old_context) override

void	regStats (const std::string &name) override

Tick	readLastActivate () override

Tick	readLastSuspend () override

void	copyArchRegs (::ThreadContext *tc) override

void	clearArchRegs () override

RegVal	readIntReg (RegIndex reg_idx) const override

RegVal	readFloatReg (RegIndex reg_idx) const override

const VecRegContainer &	readVecReg (const RegId &reg) const override

VecRegContainer &	getWritableVecReg (const RegId &reg) override

const VecElem &	readVecElem (const RegId &reg) const override

const VecPredRegContainer &	readVecPredReg (const RegId &reg) const override

VecPredRegContainer &	getWritableVecPredReg (const RegId &reg) override

RegVal	readCCReg (RegIndex reg_idx) const override

void	setIntReg (RegIndex reg_idx, RegVal val) override

void	setFloatReg (RegIndex reg_idx, RegVal val) override

void	setVecReg (const RegId &reg, const VecRegContainer &val) override

void	setVecElem (const RegId &reg, const VecElem &val) override

void	setVecPredReg (const RegId &reg, const VecPredRegContainer &val) override

void	setCCReg (RegIndex reg_idx, RegVal val) override

void	pcStateNoRecord (const ArmISA::PCState &val) override

MicroPC	microPC () const override

ArmISA::PCState	pcState () const override

void	pcState (const ArmISA::PCState &val) override

Addr	instAddr () const override

Addr	nextInstAddr () const override

RegVal	readMiscRegNoEffect (RegIndex misc_reg) const override

RegVal	readMiscReg (RegIndex misc_reg) override

void	setMiscRegNoEffect (RegIndex misc_reg, const RegVal val) override

void	setMiscReg (RegIndex misc_reg, const RegVal val) override

RegId	flattenRegId (const RegId &regId) const override

unsigned	readStCondFailures () const override

void	setStCondFailures (unsigned sc_failures) override

Counter	readFuncExeInst () const override

void	htmAbortTransaction (uint64_t htm_uid, HtmFailureFaultCause cause) override

BaseHTMCheckpointPtr &	getHtmCheckpointPtr () override

void	setHtmCheckpointPtr (BaseHTMCheckpointPtr cpt) override

ConstVecLane8	readVec8BitLaneReg (const RegId &reg) const override
	Vector Register Lane Interfaces. More...

ConstVecLane16	readVec16BitLaneReg (const RegId &reg) const override
	Reads source vector 16bit operand. More...

ConstVecLane32	readVec32BitLaneReg (const RegId &reg) const override
	Reads source vector 32bit operand. More...

ConstVecLane64	readVec64BitLaneReg (const RegId &reg) const override
	Reads source vector 64bit operand. More...

void	setVecLane (const RegId &reg, const LaneData< LaneSize::Byte > &val) override
	Write a lane of the destination vector register. More...

void	setVecLane (const RegId &reg, const LaneData< LaneSize::TwoByte > &val) override

void	setVecLane (const RegId &reg, const LaneData< LaneSize::FourByte > &val) override

void	setVecLane (const RegId &reg, const LaneData< LaneSize::EightByte > &val) override

RegVal	readIntRegFlat (RegIndex idx) const override
	Flat register interfaces. More...

void	setIntRegFlat (RegIndex idx, uint64_t val) override

RegVal	readFloatRegFlat (RegIndex idx) const override

void	setFloatRegFlat (RegIndex idx, RegVal val) override

const VecRegContainer &	readVecRegFlat (RegIndex idx) const override

VecRegContainer &	getWritableVecRegFlat (RegIndex idx) override

void	setVecRegFlat (RegIndex idx, const VecRegContainer &val) override

const VecElem &	readVecElemFlat (RegIndex idx, const ElemIndex &elemIdx) const override

void	setVecElemFlat (RegIndex idx, const ElemIndex &elemIdx, const VecElem &val) override

const VecPredRegContainer &	readVecPredRegFlat (RegIndex idx) const override

VecPredRegContainer &	getWritableVecPredRegFlat (RegIndex idx) override

void	setVecPredRegFlat (RegIndex idx, const VecPredRegContainer &val) override

RegVal	readCCRegFlat (RegIndex idx) const override

void	setCCRegFlat (RegIndex idx, RegVal val) override

Public Member Functions inherited from ThreadContext
virtual void	initMemProxies (ThreadContext *tc)=0
	Initialise the physical and virtual port proxies and tie them to the data port of the CPU. More...

void	quiesce ()
	Quiesce thread context. More...

void	quiesceTick (Tick resume)
	Quiesce, suspend, and schedule activate at resume. More...

virtual void	takeOverFrom (ThreadContext *old_context)=0

virtual void	copyArchRegs (ThreadContext *tc)=0

virtual void	pcState (const TheISA::PCState &val)=0

void	setNPC (Addr val)

virtual void	pcStateNoRecord (const TheISA::PCState &val)=0

virtual void	syscall ()=0

virtual int	exit ()

Static Protected Attributes
static IdxNameMap	miscRegIdxNameMap

static IdxNameMap	intReg32IdxNameMap

static IdxNameMap	intReg64IdxNameMap

static IdxNameMap	flattenedIntIdxNameMap

static IdxNameMap	ccRegIdxNameMap

static IdxNameMap	vecRegIdxNameMap

static std::vector< iris::MemorySpaceId >	bpSpaceIds

Additional Inherited Members
Public Types inherited from Iris::ThreadContext
typedef std::map< std::string, iris::ResourceInfo >	ResourceMap

typedef std::vector< iris::ResourceId >	ResourceIds

typedef std::map< int, std::string >	IdxNameMap

Public Types inherited from ThreadContext
enum	Status { Active, Suspended, Halting, Halted }

Static Public Member Functions inherited from ThreadContext
static void	compare (ThreadContext one, ThreadContext two)
	function to compare two thread contexts (for debugging) More...

Public Attributes inherited from ThreadContext
int	intResult = DefaultIntResult

double	floatResult = DefaultFloatResult

int	intOffset = 0

Static Public Attributes inherited from ThreadContext
static const int	ints []

static const double	floats []

static const int	DefaultIntResult = 0

static const double	DefaultFloatResult = 0.0

Protected Types inherited from Iris::ThreadContext
using	BpId = uint64_t

using	BpInfoPtr = std::unique_ptr< BpInfo >

using	BpInfoMap = std::map< Addr, BpInfoPtr >

using	BpInfoIt = BpInfoMap::iterator

Protected Types inherited from ThreadContext
typedef TheISA::MachInst	MachInst

using	VecRegContainer = TheISA::VecRegContainer

using	VecElem = TheISA::VecElem

using	VecPredRegContainer = TheISA::VecPredRegContainer

Protected Member Functions inherited from Iris::ThreadContext
iris::ResourceId	extractResourceId (const ResourceMap &resources, const std::string &name)

void	extractResourceMap (ResourceIds &ids, const ResourceMap &resources, const IdxNameMap &idx_names)

void	maintainStepping ()

BpInfoIt	getOrAllocBp (Addr pc)

void	installBp (BpInfoIt it)

void	uninstallBp (BpInfoIt it)

void	delBp (BpInfoIt it)

iris::IrisErrorCode	instanceRegistryChanged (uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)

iris::IrisErrorCode	phaseInitLeave (uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)

iris::IrisErrorCode	simulationTimeEvent (uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)

iris::IrisErrorCode	breakpointHit (uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)

iris::IrisErrorCode	semihostingEvent (uint64_t esId, const iris::IrisValueMap &fields, uint64_t time, uint64_t sInstId, bool syncEc, std::string &error_message_out)

iris::IrisCppAdapter &	call () const

iris::IrisCppAdapter &	noThrow () const

bool	translateAddress (Addr &paddr, iris::MemorySpaceId p_space, Addr vaddr, iris::MemorySpaceId v_space)

Protected Attributes inherited from Iris::ThreadContext
::BaseCPU *	_cpu

int	_threadId

ContextID	_contextId

System *	_system

::BaseTLB *	_dtb

::BaseTLB *	_itb

::BaseISA *	_isa

std::string	_irisPath

iris::InstanceId	_instId = iris::IRIS_UINT64_MAX

std::vector< ArmISA::VecRegContainer >	vecRegs

std::vector< ArmISA::VecPredRegContainer >	vecPredRegs

Status	_status = Active

Event *	enableAfterPseudoEvent

ResourceIds	miscRegIds

ResourceIds	intReg32Ids

ResourceIds	intReg64Ids

ResourceIds	flattenedIntIds

ResourceIds	ccRegIds

iris::ResourceId	pcRscId = iris::IRIS_UINT64_MAX

iris::ResourceId	icountRscId

ResourceIds	vecRegIds

ResourceIds	vecPredRegIds

std::vector< iris::MemorySpaceInfo >	memorySpaces

std::vector< iris::MemorySupportedAddressTranslationResult >	translations

std::unique_ptr< PortProxy >	virtProxy = nullptr

std::unique_ptr< PortProxy >	physProxy = nullptr

EventQueue	comInstEventQueue

BpInfoMap	bps

iris::EventStreamId	regEventStreamId

iris::EventStreamId	initEventStreamId

iris::EventStreamId	timeEventStreamId

iris::EventStreamId	breakpointEventStreamId

iris::EventStreamId	semihostingEventStreamId

iris::IrisInstance	client

Detailed Description

Definition at line 38 of file thread_context.hh.

Constructor & Destructor Documentation

◆ CortexA76TC()

FastModel::CortexA76TC::CortexA76TC	(	::BaseCPU *	cpu,
		int	id,
		System *	system,
		::BaseTLB *	dtb,
		::BaseTLB *	itb,
		::BaseISA *	isa,
		iris::IrisConnectionInterface *	iris_if,
		const std::string &	iris_path
	)

Definition at line 38 of file thread_context.cc.

Member Function Documentation

◆ getBpSpaceIds()

const std::vector< iris::MemorySpaceId > & FastModel::CortexA76TC::getBpSpaceIds ( ) const

overridevirtual

Implements Iris::ThreadContext.

Definition at line 184 of file thread_context.cc.

References bpSpaceIds, Iris::GuestMsn, Iris::HypAppMsn, Iris::ThreadContext::memorySpaces, Iris::NsHypMsn, panic_if, and Iris::SecureMonitorMsn.

◆ initFromIrisInstance()

void FastModel::CortexA76TC::initFromIrisInstance ( const ResourceMap & resources )

overridevirtual

Reimplemented from Iris::ThreadContext.

Definition at line 83 of file thread_context.cc.

References Iris::ThreadContext::ccRegIds, ccRegIdxNameMap, Iris::ThreadContext::extractResourceId(), Iris::ThreadContext::extractResourceMap(), Iris::ThreadContext::flattenedIntIds, flattenedIntIdxNameMap, Iris::ThreadContext::intReg32Ids, intReg32IdxNameMap, Iris::ThreadContext::intReg64Ids, intReg64IdxNameMap, Iris::ThreadContext::miscRegIds, miscRegIdxNameMap, Iris::ThreadContext::pcRscId, Iris::ThreadContext::vecRegIds, and vecRegIdxNameMap.

◆ readCCRegFlat()

RegVal FastModel::CortexA76TC::readCCRegFlat ( RegIndex idx ) const

overridevirtual

Implements ThreadContext.

Definition at line 144 of file thread_context.cc.

References bits(), ArmISA::CCREG_FP, ArmISA::CCREG_NZ, and Iris::ThreadContext::readCCRegFlat().

◆ readIntRegFlat()

RegVal FastModel::CortexA76TC::readIntRegFlat ( RegIndex idx ) const

overridevirtual

Flat register interfaces.

Some architectures have different registers visible in different modes. Such architectures "flatten" a register (see flattenRegId()) to map it into the gem5 register file. This interface provides a flat interface to the underlying register file, which allows for example serialization code to access all registers.

Implements ThreadContext.

Definition at line 102 of file thread_context.cc.

References ArmISA::INTREG_R13_MON, ArmISA::INTREG_R14_MON, ArmISA::MISCREG_CPSR, ArmISA::MODE_MON, ThreadContext::readIntRegFlat(), Iris::ThreadContext::readMiscRegNoEffect(), and X86ISA::val.