gem5  v20.1.0.0
GPUCommandProcessor Member List

This is the complete list of members for GPUCommandProcessor, including all inherited members.

_drainManagerDrainableprivate
_drainStateDrainablemutableprivate
_paramsSimObjectprotected
_shaderGPUCommandProcessorprivate
addStat(Stats::Info *info)Stats::Group
addStatGroup(const char *name, Group *block)Stats::Group
cacheBlockSize() constDmaDeviceinline
clockDomainClockedprivate
Clocked(ClockDomain &clk_domain)Clockedinlineprotected
Clocked(Clocked &)=deleteClockedprotected
clockEdge(Cycles cycles=Cycles(0)) constClockedinline
ClockedObject(const ClockedObjectParams *p)ClockedObject
clockPeriod() constClockedinline
clockPeriodUpdated()Clockedinlineprotectedvirtual
curCycle() constClockedinline
currentSection()Serializablestatic
cycleClockedmutableprivate
cyclesToTicks(Cycles c) constClockedinline
deschedule(Event &event)EventManagerinline
deschedule(Event *event)EventManagerinline
dispatcherGPUCommandProcessorprivate
dispatchPkt(HSAQueueEntry *task)GPUCommandProcessor
DmaDevice(const Params *p)DmaDevice
DmaFnPtr typedefHSADeviceprotected
dmaPending() constDmaDeviceinline
dmaPortDmaDeviceprotected
dmaRead(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)DmaDeviceinline
dmaRead(Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)DmaDeviceinline
dmaReadVirt(Addr host_addr, unsigned size, DmaCallback *cb, void *data, Tick delay=0)HSADevice
dmaVirt(DmaFnPtr, Addr host_addr, unsigned size, DmaCallback *cb, void *data, Tick delay=0)HSADeviceprotected
dmaWrite(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)DmaDeviceinline
dmaWrite(Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)DmaDeviceinline
dmaWriteVirt(Addr host_addr, unsigned size, DmaCallback *cb, void *data, Tick delay=0)HSADevice
dmDrain()Drainableprivate
dmDrainResume()Drainableprivate
drain() overrideSimObjectinlinevirtual
Drainable()Drainableprotected
drainResume()Drainableinlineprotectedvirtual
drainState() constDrainableinline
EventManager(EventManager &em)EventManagerinline
EventManager(EventManager *em)EventManagerinline
EventManager(EventQueue *eq)EventManagerinline
eventqEventManagerprotected
eventQueue() constEventManagerinline
find(const char *name)SimObjectstatic
frequency() constClockedinline
getAddrRanges() const overrideGPUCommandProcessorvirtual
getPort(const std::string &if_name, PortID idx=InvalidPortID) overrideDmaDevicevirtual
getProbeManager()SimObject
getStatGroups() constStats::Group
getStats() constStats::Group
GPUCommandProcessor()=deleteGPUCommandProcessor
GPUCommandProcessor(const Params *p)GPUCommandProcessor
Group()=deleteStats::Group
Group(const Group &)=deleteStats::Group
Group(Group *parent, const char *name=nullptr)Stats::Group
HSADevice(const Params *p)HSADeviceinline
hsaPacketProc()HSADevice
hsaPPHSADeviceprotected
init() overrideDmaDevicevirtual
initABI(HSAQueueEntry *task)GPUCommandProcessorprivate
initState()SimObjectvirtual
loadState(CheckpointIn &cp)SimObjectvirtual
memInvalidate()SimObjectinlinevirtual
memWriteback()SimObjectinlinevirtual
mergedParentStats::Groupprivate
mergedStatGroupsStats::Groupprivate
mergeStatGroup(Group *block)Stats::Groupprivate
name() constSimObjectinlinevirtual
nextCycle() constClockedinline
notifyFork()Drainableinlinevirtual
SimObject::operator=(const Group &)=deleteStats::Group
Clocked::operator=(Clocked &)=deleteClockedprotected
Params typedefGPUCommandProcessor
params() constPioDeviceinline
pathSerializableprivatestatic
PioDevice(const Params *p)PioDevice
pioPortPioDeviceprotected
powerStateClockedObject
preDumpStats()Stats::Groupvirtual
probeManagerSimObjectprivate
read(PacketPtr pkt) overrideGPUCommandProcessorinlinevirtual
regProbeListeners()SimObjectvirtual
regProbePoints()SimObjectvirtual
regStats()Stats::Groupvirtual
reschedule(Event &event, Tick when, bool always=false)EventManagerinline
reschedule(Event *event, Tick when, bool always=false)EventManagerinline
resetClock() constClockedinlineprotected
resetStats()Stats::Groupvirtual
resolveStat(std::string name) constStats::Group
schedule(Event &event, Tick when)EventManagerinline
schedule(Event *event, Tick when)EventManagerinline
Serializable()Serializable
serialize(CheckpointOut &cp) const overrideClockedObjectvirtual
serializeAll(CheckpointOut &cp)SimObjectstatic
Serializable::serializeAll(const std::string &cpt_dir)Serializablestatic
serializeSection(CheckpointOut &cp, const char *name) constSerializable
serializeSection(CheckpointOut &cp, const std::string &name) constSerializableinline
setCurTick(Tick newVal)EventManagerinline
setShader(Shader *shader)GPUCommandProcessor
shader()GPUCommandProcessor
signalDrainDone() constDrainableinlineprotected
SimObject(const Params *_params)SimObject
simObjectListSimObjectprivatestatic
SimObjectList typedefSimObjectprivate
startup()SimObjectvirtual
statGroupsStats::Groupprivate
statsStats::Groupprivate
submitDispatchPkt(void *raw_pkt, uint32_t queue_id, Addr host_pkt_addr) overrideGPUCommandProcessorvirtual
submitVendorPkt(void *raw_pkt, uint32_t queue_id, Addr host_pkt_addr) overrideGPUCommandProcessorvirtual
sysPioDeviceprotected
system()GPUCommandProcessor
tickClockedmutableprivate
ticksToCycles(Tick t) constClockedinline
translateOrDie(Addr vaddr, Addr &paddr)HSADeviceprotected
unserialize(CheckpointIn &cp) overrideClockedObjectvirtual
unserializeGlobals(CheckpointIn &cp)Serializablestatic
unserializeSection(CheckpointIn &cp, const char *name)Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)Serializableinline
update() constClockedinlineprivate
updateClockPeriod()Clockedinline
voltage() constClockedinline
wakeupEventQueue(Tick when=(Tick) -1)EventManagerinline
write(PacketPtr pkt) overrideGPUCommandProcessorinlinevirtual
~Clocked()Clockedinlineprotectedvirtual
~DmaDevice()DmaDeviceinlinevirtual
~Drainable()Drainableprotectedvirtual
~Group()Stats::Groupvirtual
~PioDevice()PioDevicevirtual
~Serializable()Serializablevirtual
~SimObject()SimObjectvirtual
Generated on Wed Sep 30 2020 14:02:25 for gem5 by doxygen 1.8.17