gem5  v20.1.0.0
Public Member Functions | List of all members
Gcn3ISA::Inst_SOPP__S_ENDPGM Class Reference

#include <instructions.hh>

Inheritance diagram for Gcn3ISA::Inst_SOPP__S_ENDPGM:
Gcn3ISA::Inst_SOPP Gcn3ISA::GCN3GPUStaticInst GPUStaticInst

Public Member Functions

 ~Inst_SOPP__S_ENDPGM ()
int getNumOperands () override
int numDstRegOperands () override
int numSrcRegOperands () override
int getOperandSize (int opIdx) override
bool isSrcOperand (int opIdx) override
bool isDstOperand (int opIdx) override
void execute (GPUDynInstPtr) override
- Public Member Functions inherited from Gcn3ISA::Inst_SOPP
 Inst_SOPP (InFmt_SOPP *, const std::string &opcode)
 ~Inst_SOPP ()
int instSize () const override
void generateDisassembly () override
bool isScalarRegister (int opIdx) override
bool isVectorRegister (int opIdx) override
int getRegisterIndex (int opIdx, GPUDynInstPtr gpuDynInst) override
- Public Member Functions inherited from Gcn3ISA::GCN3GPUStaticInst
 GCN3GPUStaticInst (const std::string &opcode)
 ~GCN3GPUStaticInst ()
bool isFlatScratchRegister (int opIdx) override
bool isExecMaskRegister (int opIdx) override
int coalescerTokenCount () const override
 Return the number of tokens needed by the coalescer. More...
ScalarRegU32 srcLiteral () const override
- Public Member Functions inherited from GPUStaticInst
 GPUStaticInst (const std::string &opcode)
virtual ~GPUStaticInst ()
void instAddr (int inst_addr)
int instAddr () const
int nextInstAddr () const
void instNum (int num)
int instNum ()
void ipdInstNum (int num)
int ipdInstNum () const
const std::string & disassemble ()
int numDstVecOperands ()
int numSrcVecOperands ()
int numDstVecDWORDs ()
int numSrcVecDWORDs ()
int numOpdDWORDs (int operandIdx)
bool isALU () const
bool isBranch () const
bool isCondBranch () const
bool isNop () const
bool isReturn () const
bool isEndOfKernel () const
bool isKernelLaunch () const
bool isSDWAInst () const
bool isDPPInst () const
bool isUnconditionalJump () const
bool isSpecialOp () const
bool isWaitcnt () const
bool isBarrier () const
bool isMemSync () const
bool isMemRef () const
bool isFlat () const
bool isLoad () const
bool isStore () const
bool isAtomic () const
bool isAtomicNoRet () const
bool isAtomicRet () const
bool isScalar () const
bool readsSCC () const
bool writesSCC () const
bool readsVCC () const
bool writesVCC () const
bool readsEXEC () const
bool writesEXEC () const
bool readsMode () const
bool writesMode () const
bool ignoreExec () const
bool isAtomicAnd () const
bool isAtomicOr () const
bool isAtomicXor () const
bool isAtomicCAS () const
bool isAtomicExch () const
bool isAtomicAdd () const
bool isAtomicSub () const
bool isAtomicInc () const
bool isAtomicDec () const
bool isAtomicMax () const
bool isAtomicMin () const
bool isArgLoad () const
bool isGlobalMem () const
bool isLocalMem () const
bool isArgSeg () const
bool isGlobalSeg () const
bool isGroupSeg () const
bool isKernArgSeg () const
bool isPrivateSeg () const
bool isReadOnlySeg () const
bool isSpillSeg () const
bool isGloballyCoherent () const
 Coherence domain of a memory instruction. More...
bool isSystemCoherent () const
bool isF16 () const
bool isF32 () const
bool isF64 () const
bool isFMA () const
bool isMAC () const
bool isMAD () const
virtual void initiateAcc (GPUDynInstPtr gpuDynInst)
virtual void completeAcc (GPUDynInstPtr gpuDynInst)
virtual uint32_t getTargetPc ()
void setFlag (Flags flag)
const std::string & opcode () const

Additional Inherited Members

- Public Attributes inherited from GPUStaticInst
Enums::StorageClassType executed_as
- Static Public Attributes inherited from GPUStaticInst
static uint64_t dynamic_id_count
- Protected Member Functions inherited from Gcn3ISA::GCN3GPUStaticInst
void panicUnimplemented () const
- Protected Attributes inherited from Gcn3ISA::Inst_SOPP
InFmt_SOPP instData
- Protected Attributes inherited from Gcn3ISA::GCN3GPUStaticInst
ScalarRegU32 _srcLiteral
 if the instruction has a src literal - an immediate value that is part of the instruction stream - we store that here More...
- Protected Attributes inherited from GPUStaticInst
const std::string _opcode
std::string disassembly
int _instNum
int _instAddr
int srcVecOperands
int dstVecOperands
int srcVecDWORDs
int dstVecDWORDs
int _ipdInstNum
 Identifier of the immediate post-dominator instruction. More...
std::bitset< Num_Flags > _flags

Detailed Description

Definition at line 8398 of file instructions.hh.

Constructor & Destructor Documentation



Definition at line 3725 of file

References GPUStaticInst::setFlag().

◆ ~Inst_SOPP__S_ENDPGM()


Definition at line 3731 of file

Member Function Documentation

◆ execute()

void Gcn3ISA::Inst_SOPP__S_ENDPGM::execute ( GPUDynInstPtr  gpuDynInst)

The parent WF of this instruction is exiting, therefore it should not participate in this barrier any longer. This prevents possible deadlock issues if WFs exit early.

If all WFs have finished, and hence the WG has finished, then we can free up the barrier belonging to the parent WG, but only if we actually used a barrier (i.e., more than one WF in the WG).

Last wavefront of the workgroup has executed return. If the workgroup is not the final one in the kernel, then simply retire it; however, if it is the final one (i.e., indicating the kernel end) then release operation is needed.

If a kernel end and release needed, inject a memory sync and retire the workgroup after receving all acks.

Implements GPUStaticInst.

Definition at line 3737 of file

References ComputeUnit::activeWaves, Wavefront::barrierId(), ComputeUnit::completedWfs, ComputeUnit::completedWGs, Wavefront::computeUnit, ComputeUnit::cu_id, ComputeUnit::decMaxBarrierCnt(), LdsState::decreaseRefCounter(), Shader::dispatcher(), Wavefront::dispatchId, DPRINTF, Wavefront::dropFetch, ComputeUnit::fetchStage, FetchStage::fetchUnit(), FetchUnit::flushBuf(), RegisterManager::freeRegisters(), ComputeUnit::getLds(), Wavefront::getStatus(), Wavefront::hasBarrier(), ArmISA::i, Shader::impl_kern_end_rel, Wavefront::instructionBuffer, WFBarrier::InvalidID, GPUDispatcher::isReachingKernelEnd(), Wavefront::lastInstExec, ComputeUnit::maxBarrierCnt(), GPUDispatcher::notifyWgCompl(), panic_if, Wavefront::pendingFetch, Shader::prepareFlush(), Wavefront::rawDist, Wavefront::readsPerWrite, ComputeUnit::registerManager, Wavefront::releaseBarrier(), ComputeUnit::releaseBarrier(), Wavefront::S_BARRIER, Wavefront::S_RETURNING, Wavefront::S_STOPPED, Stats::DistBase< Derived, Stor >::sample(), GPUDispatcher::scheduleDispatch(), GPUStaticInst::setFlag(), Wavefront::setStatus(), ComputeUnit::shader, Wavefront::simdId, Wavefront::vecReads, Wavefront::wfDynId, Wavefront::wfSlotId, and Wavefront::wgId.

◆ getNumOperands()

int Gcn3ISA::Inst_SOPP__S_ENDPGM::getNumOperands ( )

Implements GPUStaticInst.

Definition at line 8405 of file instructions.hh.

References numDstRegOperands(), and numSrcRegOperands().

◆ getOperandSize()

int Gcn3ISA::Inst_SOPP__S_ENDPGM::getOperandSize ( int  opIdx)

Reimplemented from Gcn3ISA::GCN3GPUStaticInst.

Definition at line 8414 of file instructions.hh.

References fatal.

◆ isDstOperand()

bool Gcn3ISA::Inst_SOPP__S_ENDPGM::isDstOperand ( int  opIdx)

Reimplemented from Gcn3ISA::GCN3GPUStaticInst.

Definition at line 8438 of file instructions.hh.

References fatal.

◆ isSrcOperand()

bool Gcn3ISA::Inst_SOPP__S_ENDPGM::isSrcOperand ( int  opIdx)

Reimplemented from Gcn3ISA::GCN3GPUStaticInst.

Definition at line 8426 of file instructions.hh.

References fatal.

◆ numDstRegOperands()

int Gcn3ISA::Inst_SOPP__S_ENDPGM::numDstRegOperands ( )

Implements GPUStaticInst.

Definition at line 8410 of file instructions.hh.

Referenced by getNumOperands().

◆ numSrcRegOperands()

int Gcn3ISA::Inst_SOPP__S_ENDPGM::numSrcRegOperands ( )

Implements GPUStaticInst.

Definition at line 8411 of file instructions.hh.

Referenced by getNumOperands().

The documentation for this class was generated from the following files:

Generated on Wed Sep 30 2020 14:02:51 for gem5 by doxygen 1.8.17