gem5  v20.1.0.0
Iris::BaseCPU Member List

This is the complete list of members for Iris::BaseCPU, including all inherited members.

_cacheLineSizeBaseCPUprotected
_cpuIdBaseCPUprotected
_dataRequestorIdBaseCPUprotected
_instRequestorIdBaseCPUprotected
_pidBaseCPUprotected
_socketIdBaseCPUprotected
_switchedOutBaseCPUprotected
_taskIdBaseCPUprotected
activateContext(ThreadID thread_num)BaseCPUvirtual
addressMonitorBaseCPUprivate
armMonitor(ThreadID tid, Addr address)BaseCPU
BaseCPU(BaseCPUParams *params, sc_core::sc_module *_evs)Iris::BaseCPU
BaseCPU::BaseCPU(Params *params, bool is_checker=false)BaseCPU
cacheLineSize() constBaseCPUinline
checkInterrupts(ThreadID tid) constBaseCPUinline
clearInterrupt(ThreadID tid, int int_num, int index)BaseCPUinline
clearInterrupts(ThreadID tid)BaseCPUinline
clockEventIris::BaseCPUprivate
clockPeriodUpdated() overrideIris::BaseCPUinlineprotected
contextToThread(ContextID cid)BaseCPUinline
CPU_STATE_ON enum valueBaseCPUprotected
CPU_STATE_SLEEP enum valueBaseCPUprotected
CPU_STATE_WAKEUP enum valueBaseCPUprotected
cpuId() constBaseCPUinline
cpuListBaseCPUprivatestatic
CPUState enum nameBaseCPUprotected
currentFunctionEndBaseCPUprivate
currentFunctionStartBaseCPUprivate
dataRequestorId() constBaseCPUinline
deschedulePowerGatingEvent()BaseCPU
enableFunctionTrace()BaseCPUprivate
enterPwrGating()BaseCPUprotected
enterPwrGatingEventBaseCPUprotected
evsIris::BaseCPUprotected
findContext(ThreadContext *tc)BaseCPU
flushTLBs()BaseCPU
functionEntryTickBaseCPUprivate
functionTraceStreamBaseCPUprivate
functionTracingEnabledBaseCPUprivate
getContext(int tn)BaseCPUinlinevirtual
getCpuAddrMonitor(ThreadID tid)BaseCPUinline
getCurrentInstCount(ThreadID tid)BaseCPU
getDataPort() overrideIris::BaseCPUinlinevirtual
getInstPort() overrideIris::BaseCPUinlinevirtual
getInterruptController(ThreadID tid)BaseCPUinline
getPid() constBaseCPUinline
getPort(const std::string &if_name, PortID idx=InvalidPortID) overrideBaseCPU
getSendFunctional() overrideIris::BaseCPUinlinevirtual
getTracer()BaseCPUinline
haltContext(ThreadID thread_num)BaseCPUvirtual
init() overrideIris::BaseCPUprotected
instCntBaseCPUprotected
instCount()BaseCPUinline
instRequestorId() constBaseCPUinline
interruptsBaseCPUprotected
invldPidBaseCPUstatic
mwait(ThreadID tid, PacketPtr pkt)BaseCPU
mwaitAtomic(ThreadID tid, ThreadContext *tc, BaseTLB *dtb)BaseCPU
numContexts()BaseCPUinline
numCyclesBaseCPU
numSimulatedCPUs()BaseCPUinlinestatic
numSimulatedInsts()BaseCPUinlinestatic
numSimulatedInsts()BaseCPUinlinestatic
numSimulatedOps()BaseCPUinlinestatic
numSimulatedOps()BaseCPUinlinestatic
numThreadsBaseCPU
numWorkItemsCompletedBaseCPU
numWorkItemsStartedBaseCPU
Params typedefBaseCPU
params() constBaseCPUinline
PCMaskBaseCPUstatic
periodAttributeIris::BaseCPUprivate
pmuProbePoint(const char *name)BaseCPUprotected
postInterrupt(ThreadID tid, int int_num, int index)BaseCPU
powerGatingOnIdleBaseCPUprotected
ppActiveCyclesBaseCPUprotected
ppAllCyclesBaseCPUprotected
ppRetiredBranchesBaseCPUprotected
ppRetiredInstsBaseCPUprotected
ppRetiredInstsPCBaseCPUprotected
ppRetiredLoadsBaseCPUprotected
ppRetiredStoresBaseCPUprotected
ppSleepingBaseCPUprotected
previousCycleBaseCPUprotected
previousStateBaseCPUprotected
probeInstCommit(const StaticInstPtr &inst, Addr pc)BaseCPUvirtual
pwrGatingLatencyBaseCPUprotected
registerThreadContexts()BaseCPU
regProbePoints() overrideBaseCPU
regStats() overrideBaseCPU
scheduleInstStop(ThreadID tid, Counter insts, const char *cause)BaseCPU
schedulePowerGatingEvent()BaseCPU
sendFunctionalIris::BaseCPUprivate
serialize(CheckpointOut &cp) const overrideBaseCPU
serializeThread(CheckpointOut &cp, ThreadID tid) const overrideIris::BaseCPUprotectedvirtual
setPid(uint32_t pid)BaseCPUinline
socketId() constBaseCPUinline
startup() overrideBaseCPU
suspendContext(ThreadID thread_num)BaseCPUvirtual
switchedOut() constBaseCPUinline
switchOut()BaseCPUvirtual
syscallRetryLatencyBaseCPU
systemBaseCPU
takeOverFrom(BaseCPU *cpu)BaseCPUvirtual
taskId() constBaseCPUinline
taskId(uint32_t id)BaseCPUinline
threadContextsBaseCPUprotected
totalInsts() const overrideIris::BaseCPUvirtual
totalOps() const overrideIris::BaseCPUinlinevirtual
traceFunctions(Addr pc)BaseCPUinline
traceFunctionsInternal(Addr pc)BaseCPUprivate
tracerBaseCPUprotected
unserialize(CheckpointIn &cp) overrideBaseCPU
unserializeThread(CheckpointIn &cp, ThreadID tid)BaseCPUinlinevirtual
updateCycleCounters(CPUState state)BaseCPUinlineprotected
verifyMemoryMode() constBaseCPUinlinevirtual
waitForRemoteGDB() constBaseCPU
wakeup(ThreadID tid) overrideIris::BaseCPUinlinevirtual
workItemBegin()BaseCPUinline
workItemEnd()BaseCPUinline
~BaseCPU()Iris::BaseCPUvirtual

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