gem5  v20.1.0.0
Public Member Functions | Protected Member Functions | Protected Attributes | Private Attributes | List of all members
Iris::BaseCPU Class Reference

#include <cpu.hh>

Inheritance diagram for Iris::BaseCPU:
BaseCPU Iris::CPU< CortexA76TC > Iris::CPU< TC > FastModel::CortexA76

Public Member Functions

 BaseCPU (BaseCPUParams *params, sc_core::sc_module *_evs)
 
virtual ~BaseCPU ()
 
PortgetDataPort () override
 Purely virtual method that returns a reference to the data port. More...
 
PortgetInstPort () override
 Purely virtual method that returns a reference to the instruction port. More...
 
void wakeup (ThreadID tid) override
 
Counter totalInsts () const override
 
Counter totalOps () const override
 
PortProxy::SendFunctionalFunc getSendFunctional () override
 Returns a sendFunctional delegate for use with port proxies. More...
 
- Public Member Functions inherited from BaseCPU
int cpuId () const
 Reads this CPU's ID. More...
 
uint32_t socketId () const
 Reads this CPU's Socket ID. More...
 
RequestorID dataRequestorId () const
 Reads this CPU's unique data requestor ID. More...
 
RequestorID instRequestorId () const
 Reads this CPU's unique instruction requestor ID. More...
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port on this CPU. More...
 
uint32_t taskId () const
 Get cpu task id. More...
 
void taskId (uint32_t id)
 Set cpu task id. More...
 
uint32_t getPid () const
 
void setPid (uint32_t pid)
 
void workItemBegin ()
 
void workItemEnd ()
 
Tick instCount ()
 
BaseInterruptsgetInterruptController (ThreadID tid)
 
void postInterrupt (ThreadID tid, int int_num, int index)
 
void clearInterrupt (ThreadID tid, int int_num, int index)
 
void clearInterrupts (ThreadID tid)
 
bool checkInterrupts (ThreadID tid) const
 
Trace::InstTracergetTracer ()
 Provide access to the tracer pointer. More...
 
virtual void activateContext (ThreadID thread_num)
 Notify the CPU that the indicated context is now active. More...
 
virtual void suspendContext (ThreadID thread_num)
 Notify the CPU that the indicated context is now suspended. More...
 
virtual void haltContext (ThreadID thread_num)
 Notify the CPU that the indicated context is now halted. More...
 
int findContext (ThreadContext *tc)
 Given a Thread Context pointer return the thread num. More...
 
virtual ThreadContextgetContext (int tn)
 Given a thread num get tho thread context for it. More...
 
unsigned numContexts ()
 Get the number of thread contexts available. More...
 
ThreadID contextToThread (ContextID cid)
 Convert ContextID to threadID. More...
 
const Paramsparams () const
 
 BaseCPU (Params *params, bool is_checker=false)
 
void init () override
 
void startup () override
 
void regStats () override
 
void regProbePoints () override
 
void registerThreadContexts ()
 
void deschedulePowerGatingEvent ()
 
void schedulePowerGatingEvent ()
 
virtual void switchOut ()
 Prepare for another CPU to take over execution. More...
 
virtual void takeOverFrom (BaseCPU *cpu)
 Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be switched in. More...
 
void flushTLBs ()
 Flush all TLBs in the CPU. More...
 
bool switchedOut () const
 Determine if the CPU is switched out. More...
 
virtual void verifyMemoryMode () const
 Verify that the system is in a memory mode supported by the CPU. More...
 
unsigned int cacheLineSize () const
 Get the cache line size of the system. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize this object to the given output stream. More...
 
void unserialize (CheckpointIn &cp) override
 Reconstruct the state of this object from a checkpoint. More...
 
virtual void unserializeThread (CheckpointIn &cp, ThreadID tid)
 Unserialize one thread. More...
 
void scheduleInstStop (ThreadID tid, Counter insts, const char *cause)
 Schedule an event that exits the simulation loops after a predefined number of instructions. More...
 
uint64_t getCurrentInstCount (ThreadID tid)
 Get the number of instructions executed by the specified thread on this CPU. More...
 
void traceFunctions (Addr pc)
 
void armMonitor (ThreadID tid, Addr address)
 
bool mwait (ThreadID tid, PacketPtr pkt)
 
void mwaitAtomic (ThreadID tid, ThreadContext *tc, BaseTLB *dtb)
 
AddressMonitorgetCpuAddrMonitor (ThreadID tid)
 
bool waitForRemoteGDB () const
 
virtual void probeInstCommit (const StaticInstPtr &inst, Addr pc)
 Helper method to trigger PMU probes for a committed instruction. More...
 

Protected Member Functions

void clockPeriodUpdated () override
 
void init () override
 
void serializeThread (CheckpointOut &cp, ThreadID tid) const override
 Serialize a single thread. More...
 
- Protected Member Functions inherited from BaseCPU
void updateCycleCounters (CPUState state)
 base method keeping track of cycle progression More...
 
void enterPwrGating ()
 
ProbePoints::PMUUPtr pmuProbePoint (const char *name)
 Helper method to instantiate probe points belonging to this object. More...
 

Protected Attributes

sc_core::sc_moduleevs
 
- Protected Attributes inherited from BaseCPU
Tick instCnt
 Instruction count used for SPARC misc register. More...
 
int _cpuId
 
const uint32_t _socketId
 Each cpu will have a socket ID that corresponds to its physical location in the system. More...
 
RequestorID _instRequestorId
 instruction side request id that must be placed in all requests More...
 
RequestorID _dataRequestorId
 data side request id that must be placed in all requests More...
 
uint32_t _taskId
 An intrenal representation of a task identifier within gem5. More...
 
uint32_t _pid
 The current OS process ID that is executing on this processor. More...
 
bool _switchedOut
 Is the CPU switched out or active? More...
 
const unsigned int _cacheLineSize
 Cache the cache line size that we get from the system. More...
 
std::vector< BaseInterrupts * > interrupts
 
std::vector< ThreadContext * > threadContexts
 
Trace::InstTracertracer
 
Cycles previousCycle
 
CPUState previousState
 
const Cycles pwrGatingLatency
 
const bool powerGatingOnIdle
 
EventFunctionWrapper enterPwrGatingEvent
 
ProbePoints::PMUUPtr ppRetiredInsts
 Instruction commit probe point. More...
 
ProbePoints::PMUUPtr ppRetiredInstsPC
 
ProbePoints::PMUUPtr ppRetiredLoads
 Retired load instructions. More...
 
ProbePoints::PMUUPtr ppRetiredStores
 Retired store instructions. More...
 
ProbePoints::PMUUPtr ppRetiredBranches
 Retired branches (any type) More...
 
ProbePoints::PMUUPtr ppAllCycles
 CPU cycle counter even if any thread Context is suspended. More...
 
ProbePoints::PMUUPtr ppActiveCycles
 CPU cycle counter, only counts if any thread contexts is active. More...
 
ProbePointArg< bool > * ppSleeping
 ProbePoint that signals transitions of threadContexts sets. More...
 

Private Attributes

sc_core::sc_eventclockEvent
 
sc_core::sc_attribute< Tick > * periodAttribute
 
sc_core::sc_attribute< PortProxy::SendFunctionalFunc > * sendFunctional
 

Additional Inherited Members

- Public Types inherited from BaseCPU
typedef BaseCPUParams Params
 
- Static Public Member Functions inherited from BaseCPU
static int numSimulatedInsts ()
 
static int numSimulatedOps ()
 
static void wakeup (ThreadID tid)
 
static int numSimulatedCPUs ()
 
static Counter numSimulatedInsts ()
 
static Counter numSimulatedOps ()
 
- Public Attributes inherited from BaseCPU
ThreadID numThreads
 Number of threads we're actually simulating (<= SMT_MAX_THREADS). More...
 
Systemsystem
 
Stats::Scalar numCycles
 
Stats::Scalar numWorkItemsStarted
 
Stats::Scalar numWorkItemsCompleted
 
Cycles syscallRetryLatency
 
- Static Public Attributes inherited from BaseCPU
static const uint32_t invldPid = std::numeric_limits<uint32_t>::max()
 Invalid or unknown Pid. More...
 
static const Addr PCMask = ~((Addr)sizeof(TheISA::MachInst) - 1)
 
- Protected Types inherited from BaseCPU
enum  CPUState { CPU_STATE_ON, CPU_STATE_SLEEP, CPU_STATE_WAKEUP }
 

Detailed Description

Definition at line 58 of file cpu.hh.

Constructor & Destructor Documentation

◆ BaseCPU()

BaseCPU::BaseCPU ( BaseCPUParams *  params,
sc_core::sc_module _evs 
)

◆ ~BaseCPU()

BaseCPU::~BaseCPU ( )
virtual

Reimplemented from BaseCPU.

Definition at line 71 of file cpu.cc.

References BaseCPU::threadContexts.

Member Function Documentation

◆ clockPeriodUpdated()

void Iris::BaseCPU::clockPeriodUpdated ( )
inlineoverrideprotected

◆ getDataPort()

Port& Iris::BaseCPU::getDataPort ( )
inlineoverridevirtual

Purely virtual method that returns a reference to the data port.

All subclasses must implement this method.

Returns
a reference to the data port

Implements BaseCPU.

Definition at line 65 of file cpu.hh.

References panic.

◆ getInstPort()

Port& Iris::BaseCPU::getInstPort ( )
inlineoverridevirtual

Purely virtual method that returns a reference to the instruction port.

All subclasses must implement this method.

Returns
a reference to the instruction port

Implements BaseCPU.

Definition at line 71 of file cpu.hh.

References panic.

◆ getSendFunctional()

PortProxy::SendFunctionalFunc Iris::BaseCPU::getSendFunctional ( )
inlineoverridevirtual

Returns a sendFunctional delegate for use with port proxies.

Reimplemented from BaseCPU.

Definition at line 88 of file cpu.hh.

References sendFunctional, and sc_core::sc_attribute< T >::value.

Referenced by Iris::ThreadContext::initMemProxies().

◆ init()

void BaseCPU::init ( )
overrideprotected

Definition at line 88 of file cpu.cc.

References BaseCPU::init(), and BaseCPU::threadContexts.

◆ serializeThread()

void BaseCPU::serializeThread ( CheckpointOut cp,
ThreadID  tid 
) const
overrideprotectedvirtual

Serialize a single thread.

Parameters
cpThe stream to serialize to.
tidID of the current thread.

Reimplemented from BaseCPU.

Definition at line 96 of file cpu.cc.

References BaseCPU::serialize(), and BaseCPU::threadContexts.

◆ totalInsts()

Counter BaseCPU::totalInsts ( ) const
overridevirtual

Implements BaseCPU.

Definition at line 79 of file cpu.cc.

References X86ISA::count, and BaseCPU::threadContexts.

Referenced by totalOps().

◆ totalOps()

Counter Iris::BaseCPU::totalOps ( ) const
inlineoverridevirtual

Implements BaseCPU.

Definition at line 85 of file cpu.hh.

References totalInsts().

◆ wakeup()

void Iris::BaseCPU::wakeup ( ThreadID  tid)
inlineoverridevirtual

Implements BaseCPU.

Definition at line 77 of file cpu.hh.

References ThreadContext::Suspended, and BaseCPU::threadContexts.

Member Data Documentation

◆ clockEvent

sc_core::sc_event* Iris::BaseCPU::clockEvent
private

Definition at line 99 of file cpu.hh.

Referenced by BaseCPU(), and clockPeriodUpdated().

◆ evs

sc_core::sc_module* Iris::BaseCPU::evs
protected

Definition at line 96 of file cpu.hh.

Referenced by BaseCPU(), and Iris::CPU< CortexA76TC >::CPU().

◆ periodAttribute

sc_core::sc_attribute<Tick>* Iris::BaseCPU::periodAttribute
private

Definition at line 100 of file cpu.hh.

Referenced by BaseCPU(), and clockPeriodUpdated().

◆ sendFunctional

sc_core::sc_attribute<PortProxy::SendFunctionalFunc>* Iris::BaseCPU::sendFunctional
private

Definition at line 101 of file cpu.hh.

Referenced by BaseCPU(), and getSendFunctional().


The documentation for this class was generated from the following files:

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