_drainManager | Drainable | private |
_drainState | Drainable | mutableprivate |
_params | SimObject | protected |
addStat(Stats::Info *info) | Stats::Group | |
addStatGroup(const char *name, Group *block) | Stats::Group | |
BaseInterrupts(Params *p) | BaseInterrupts | inline |
BitUnion32(LVTEntry) Bitfield< 7 | X86ISA::Interrupts | protected |
checkInterrupts() const override | X86ISA::Interrupts | virtual |
checkInterruptsRaw() const | X86ISA::Interrupts | |
clear(int int_num, int index) override | X86ISA::Interrupts | inlinevirtual |
clearAll() override | X86ISA::Interrupts | inlinevirtual |
clearRegArrayBit(ApicRegIndex base, uint8_t vector) | X86ISA::Interrupts | inlineprotected |
clockDomain | X86ISA::Interrupts | protected |
clockPeriod() const | X86ISA::Interrupts | inlineprotected |
completeIPI(PacketPtr pkt) | X86ISA::Interrupts | |
currentSection() | Serializable | static |
deliveryMode | X86ISA::Interrupts | protected |
deschedule(Event &event) | EventManager | inline |
deschedule(Event *event) | EventManager | inline |
dmDrain() | Drainable | private |
dmDrainResume() | Drainable | private |
drain() override | SimObject | inlinevirtual |
Drainable() | Drainable | protected |
drainResume() | Drainable | inlineprotectedvirtual |
drainState() const | Drainable | inline |
EndBitUnion(LVTEntry) EventFunctionWrapper apicTimerEvent | X86ISA::Interrupts | protected |
EventManager(EventManager &em) | EventManager | inline |
EventManager(EventManager *em) | EventManager | inline |
EventManager(EventQueue *eq) | EventManager | inline |
eventq | EventManager | protected |
eventQueue() const | EventManager | inline |
extIntVector | X86ISA::Interrupts | protected |
find(const char *name) | SimObject | static |
findRegArrayMSB(ApicRegIndex base) | X86ISA::Interrupts | inlineprotected |
getAddrRanges() const | X86ISA::Interrupts | |
getInitialApicId() | X86ISA::Interrupts | inline |
getIntAddrRange() const | X86ISA::Interrupts | |
getInterrupt() override | X86ISA::Interrupts | virtual |
getPort(const std::string &if_name, PortID idx=InvalidPortID) override | X86ISA::Interrupts | inlinevirtual |
getProbeManager() | SimObject | |
getRegArrayBit(ApicRegIndex base, uint8_t vector) | X86ISA::Interrupts | inlineprotected |
getStatGroups() const | Stats::Group | |
getStats() const | Stats::Group | |
Group()=delete | Stats::Group | |
Group(const Group &)=delete | Stats::Group | |
Group(Group *parent, const char *name=nullptr) | Stats::Group | |
hasPendingUnmaskable() const | X86ISA::Interrupts | inline |
init() override | X86ISA::Interrupts | virtual |
initialApicId | X86ISA::Interrupts | protected |
initState() | SimObject | virtual |
initVector | X86ISA::Interrupts | protected |
Interrupts(Params *p) | X86ISA::Interrupts | |
intRequestPort | X86ISA::Interrupts | protected |
intResponsePort | X86ISA::Interrupts | protected |
IRRV | X86ISA::Interrupts | protected |
ISRV | X86ISA::Interrupts | protected |
loadState(CheckpointIn &cp) | SimObject | virtual |
masked | X86ISA::Interrupts | protected |
memInvalidate() | SimObject | inlinevirtual |
memWriteback() | SimObject | inlinevirtual |
mergedParent | Stats::Group | private |
mergedStatGroups | Stats::Group | private |
mergeStatGroup(Group *block) | Stats::Group | private |
name() const | SimObject | inlinevirtual |
nmiVector | X86ISA::Interrupts | protected |
notifyFork() | Drainable | inlinevirtual |
operator=(const Group &)=delete | Stats::Group | |
params() const | X86ISA::Interrupts | inline |
Params typedef | X86ISA::Interrupts | |
path | Serializable | privatestatic |
pendingExtInt | X86ISA::Interrupts | protected |
pendingInit | X86ISA::Interrupts | protected |
pendingIPIs | X86ISA::Interrupts | protected |
pendingNmi | X86ISA::Interrupts | protected |
pendingSmi | X86ISA::Interrupts | protected |
pendingStartup | X86ISA::Interrupts | protected |
pendingUnmaskableInt | X86ISA::Interrupts | protected |
periodic | X86ISA::Interrupts | protected |
pioAddr | X86ISA::Interrupts | protected |
pioDelay | X86ISA::Interrupts | protected |
pioPort | X86ISA::Interrupts | protected |
polarity | X86ISA::Interrupts | protected |
post(int int_num, int index) override | X86ISA::Interrupts | inlinevirtual |
preDumpStats() | Stats::Group | virtual |
probeManager | SimObject | private |
processApicTimerEvent() | X86ISA::Interrupts | protected |
read(PacketPtr pkt) | X86ISA::Interrupts | |
readReg(ApicRegIndex miscReg) | X86ISA::Interrupts | |
recvMessage(PacketPtr pkt) | X86ISA::Interrupts | |
regProbeListeners() | SimObject | virtual |
regProbePoints() | SimObject | virtual |
regs | X86ISA::Interrupts | protected |
regStats() | Stats::Group | virtual |
remoteIRR | X86ISA::Interrupts | protected |
requestInterrupt(uint8_t vector, uint8_t deliveryMode, bool level) | X86ISA::Interrupts | protected |
reschedule(Event &event, Tick when, bool always=false) | EventManager | inline |
reschedule(Event *event, Tick when, bool always=false) | EventManager | inline |
resetStats() | Stats::Group | virtual |
resolveStat(std::string name) const | Stats::Group | |
schedule(Event &event, Tick when) | EventManager | inline |
schedule(Event *event, Tick when) | EventManager | inline |
Serializable() | Serializable | |
serialize(CheckpointOut &cp) const override | X86ISA::Interrupts | virtual |
serializeAll(CheckpointOut &cp) | SimObject | static |
Serializable::serializeAll(const std::string &cpt_dir) | Serializable | static |
serializeSection(CheckpointOut &cp, const char *name) const | Serializable | |
serializeSection(CheckpointOut &cp, const std::string &name) const | Serializable | inline |
setCurTick(Tick newVal) | EventManager | inline |
setReg(ApicRegIndex reg, uint32_t val) | X86ISA::Interrupts | |
setRegArrayBit(ApicRegIndex base, uint8_t vector) | X86ISA::Interrupts | inlineprotected |
setRegNoEffect(ApicRegIndex reg, uint32_t val) | X86ISA::Interrupts | inline |
setThreadContext(ThreadContext *_tc) override | X86ISA::Interrupts | virtual |
signalDrainDone() const | Drainable | inlineprotected |
SimObject(const Params *_params) | SimObject | |
simObjectList | SimObject | privatestatic |
SimObjectList typedef | SimObject | private |
smiVector | X86ISA::Interrupts | protected |
startedUp | X86ISA::Interrupts | protected |
startup() | SimObject | virtual |
startupVector | X86ISA::Interrupts | protected |
statGroups | Stats::Group | private |
stats | Stats::Group | private |
status | X86ISA::Interrupts | protected |
sys | X86ISA::Interrupts | protected |
tc | BaseInterrupts | protected |
trigger | X86ISA::Interrupts | protected |
triggerTimerInterrupt() | X86ISA::Interrupts | inline |
unserialize(CheckpointIn &cp) override | X86ISA::Interrupts | virtual |
unserializeGlobals(CheckpointIn &cp) | Serializable | static |
unserializeSection(CheckpointIn &cp, const char *name) | Serializable | |
unserializeSection(CheckpointIn &cp, const std::string &name) | Serializable | inline |
updateIntrInfo() override | X86ISA::Interrupts | virtual |
updateIRRV() | X86ISA::Interrupts | inlineprotected |
updateISRV() | X86ISA::Interrupts | inlineprotected |
vector | X86ISA::Interrupts | protected |
wakeupEventQueue(Tick when=(Tick) -1) | EventManager | inline |
write(PacketPtr pkt) | X86ISA::Interrupts | |
~Drainable() | Drainable | protectedvirtual |
~Group() | Stats::Group | virtual |
~Serializable() | Serializable | virtual |
~SimObject() | SimObject | virtual |