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28 #ifndef __ARCH_ARM_FASTMODEL_PROTOCOL_EXPORTED_CLOCK_RATE_CONTROL_HH__
29 #define __ARCH_ARM_FASTMODEL_PROTOCOL_EXPORTED_CLOCK_RATE_CONTROL_HH__
45 virtual void set_mul_div(uint64_t mul, uint64_t div) = 0;
72 using Base::operator();
86 return "ClockRateControlInitiatorSocket";
105 using Base::operator();
112 return "ClockRateControlInitiatorSocket";
122 #endif // __ARCH_ARM_FASTMODEL_PROTOCOL_EXPORTED_CLOCK_RATE_CONTROL_HH__
ClockRateControlBwIf dummyBwIf
virtual void set_mul_div(uint64_t mul, uint64_t div)=0
tlm::tlm_base_target_socket< 64, ClockRateControlFwIf, ClockRateControlBwIf > Base
ClockRateControlSlaveBase(const std::string &name)
std::type_index get_protocol_types() const override
ClockRateControlInitiatorSocket()
virtual sc_core::sc_export< ClockRateControlBwIf > & get_base_export()
const char * kind() const override
virtual ~ClockRateControlBwIf()
std::type_index get_protocol_types() const override
const std::string & name()
virtual ~ClockRateControlFwIf()
const char * kind() const override
ClockRateControlInitiatorSocket(const char *name)
virtual void bind(base_target_socket_type &s)
const char * name() const
tlm::tlm_base_initiator_socket< 64, ClockRateControlFwIf, ClockRateControlBwIf > Base
virtual void bind(base_initiator_socket_type &s)
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