gem5  v20.1.0.0
phase.cc
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3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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19 
20 #include <cstring>
21 #include <map>
22 #include <string>
23 #include <typeindex>
24 
27 
28 namespace tlm
29 {
30 
31 namespace
32 {
33 
34 struct tlm_phase_registry
35 {
36  typedef unsigned int key_type;
37 
38  static tlm_phase_registry &
39  instance()
40  {
41  static tlm_phase_registry inst;
42  return inst;
43  }
44 
45  unsigned int
46  register_phase(std::type_index type, std::string name)
47  {
48  type_map::const_iterator it = ids_.find(type);
49 
50  if (name.empty()) {
52  "unexpected empty tlm_phase name" );
53  return UNINITIALIZED_PHASE;
54  }
55 
56  if (it == ids_.end()) {
57  // new phase - generate/store ID and name
58  type_map::value_type v(type, static_cast<key_type>(names_.size()));
59  names_.push_back(name_table::value_type(name.data(), name.size()));
60  ids_.insert(v);
61  return v.second;
62  }
63 
64  if (names_[it->second] != name) {
66  "tlm_phase registration failed: duplicate type info" );
68  }
69  return it->second;
70  }
71 
72  const char *
73  get_name(key_type id) const
74  {
75  sc_assert(id < names_.size());
76  return names_[id].c_str();
77  }
78 
79  private:
80  typedef std::map<std::type_index, key_type> type_map;
81  typedef std::vector<std::string> name_table;
82 
83  type_map ids_;
84  name_table names_;
85 
86  tlm_phase_registry() : names_(END_RESP + 1)
87  {
88  names_[UNINITIALIZED_PHASE] = "UNINITIALIZED_PHASE";
89  names_[BEGIN_REQ] = "BEGIN_REQ";
90  names_[END_REQ] = "END_REQ";
91  names_[BEGIN_RESP] = "BEGIN_RESP";
92  names_[END_RESP] = "END_RESP";
93  }
94 };
95 
96 } // anonymous namespace
97 
98 tlm_phase::tlm_phase(unsigned int id) : m_id(id)
99 {}
100 
101 tlm_phase::tlm_phase(const std::type_info &type, const char *name) :
102  m_id(tlm_phase_registry::instance().register_phase(type, name))
103 {}
104 
105 const char *
106 tlm_phase::get_name() const
107 {
108  return tlm_phase_registry::instance().get_name(m_id);
109 }
110 
111 } // namespace tlm
phase.hh
tlm::UNINITIALIZED_PHASE
@ UNINITIALIZED_PHASE
Definition: phase.hh:40
type
uint8_t type
Definition: inet.hh:421
tlm::END_REQ
@ END_REQ
Definition: phase.hh:42
SC_REPORT_FATAL
#define SC_REPORT_FATAL(msg_type, msg)
Definition: sc_report_handler.hh:131
std::vector< std::string >
tlm::tlm_phase::tlm_phase
tlm_phase()
Definition: phase.hh:67
sc_assert
#define sc_assert(expr)
Definition: sc_report_handler.hh:135
tlm::tlm_phase::m_id
unsigned int m_id
Definition: phase.hh:64
tlm
Definition: analysis_fifo.hh:27
tlm::END_RESP
@ END_RESP
Definition: phase.hh:44
sc_core::SC_ID_INTERNAL_ERROR_
const char SC_ID_INTERNAL_ERROR_[]
Definition: messages.cc:38
name
const std::string & name()
Definition: trace.cc:50
tlm::BEGIN_REQ
@ BEGIN_REQ
Definition: phase.hh:41
ids_
type_map ids_
Definition: instance_specific_extensions.cc:77
sc_report_handler.hh
sc_core::sc_abort
void sc_abort()
Definition: sc_report.cc:178
tlm::tlm_phase::get_name
const char * get_name() const
Definition: phase.cc:123
ArmISA::v
Bitfield< 28 > v
Definition: miscregs_types.hh:51
tlm::BEGIN_RESP
@ BEGIN_RESP
Definition: phase.hh:43
ArmISA::id
Bitfield< 33 > id
Definition: miscregs_types.hh:247

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