gem5  v20.1.0.0
decoder.hh
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28 
29 #ifndef __ARCH_POWER_DECODER_HH__
30 #define __ARCH_POWER_DECODER_HH__
31 
33 #include "arch/generic/decoder.hh"
34 #include "arch/types.hh"
35 #include "cpu/static_inst.hh"
36 
37 namespace PowerISA
38 {
39 
40 class ISA;
41 class Decoder : public InstDecoder
42 {
43  protected:
44  // The extended machine instruction being generated
46  bool instDone;
47 
48  public:
49  Decoder(ISA* isa = nullptr) : instDone(false)
50  {
51  }
52 
53  void
55  {
56  }
57 
58  void
60  {
61  instDone = false;
62  }
63 
64  // Use this to give data to the predecoder. This should be used
65  // when there is control flow.
66  void
67  moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
68  {
69  emi = betoh(inst);
70  instDone = true;
71  }
72 
73  // Use this to give data to the predecoder. This should be used
74  // when instructions are executed in order.
75  void
76  moreBytes(MachInst machInst)
77  {
78  moreBytes(0, 0, machInst);
79  }
80 
81  bool
83  {
84  return true;
85  }
86 
87  bool
89  {
90  return instDone;
91  }
92 
93  void takeOverFrom(Decoder *old) {}
94 
95  protected:
98 
99  public:
101 
107  {
108  return defaultCache.decode(this, mach_inst, addr);
109  }
110 
113  {
114  if (!instDone)
115  return NULL;
116  instDone = false;
117  return decode(emi, nextPC.instAddr());
118  }
119 };
120 
121 } // namespace PowerISA
122 
123 #endif // __ARCH_POWER_DECODER_HH__
PowerISA::Decoder::moreBytes
void moreBytes(MachInst machInst)
Definition: decoder.hh:76
PowerISA::Decoder::instReady
bool instReady()
Definition: decoder.hh:88
GenericISA::BasicDecodeCache::decode
StaticInstPtr decode(TheISA::Decoder *const decoder, TheISA::ExtMachInst mach_inst, Addr addr)
Decode a machine instruction.
Definition: decode_cache.cc:40
PowerISA::ISA
Definition: isa.hh:48
decode_cache.hh
PowerISA::Decoder::reset
void reset()
Definition: decoder.hh:59
PowerISA::Decoder
Definition: decoder.hh:41
GenericISA::BasicDecodeCache
Definition: decode_cache.hh:45
PowerISA::Decoder::emi
ExtMachInst emi
Definition: decoder.hh:45
PowerISA::MachInst
uint32_t MachInst
Definition: types.hh:39
PowerISA::Decoder::decode
StaticInstPtr decode(ExtMachInst mach_inst, Addr addr)
Decode a machine instruction.
Definition: decoder.hh:106
decoder.hh
PowerISA
Definition: decoder.cc:31
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
PowerISA::Decoder::needMoreBytes
bool needMoreBytes()
Definition: decoder.hh:82
static_inst.hh
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
betoh
T betoh(T value)
Definition: byteswap.hh:143
PowerISA::Decoder::decode
StaticInstPtr decode(PowerISA::PCState &nextPC)
Definition: decoder.hh:112
PowerISA::Decoder::process
void process()
Definition: decoder.hh:54
PowerISA::Decoder::instDone
bool instDone
Definition: decoder.hh:46
PowerISA::Decoder::moreBytes
void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
Definition: decoder.hh:67
MipsISA::PCState
GenericISA::DelaySlotPCState< MachInst > PCState
Definition: types.hh:41
addr
ip6_addr_t addr
Definition: inet.hh:423
PowerISA::Decoder::decodeInst
StaticInstPtr decodeInst(ExtMachInst mach_inst)
PowerISA::Decoder::defaultCache
static GenericISA::BasicDecodeCache defaultCache
A cache of decoded instruction objects.
Definition: decoder.hh:97
InstDecoder
Definition: decoder.hh:34
RefCountingPtr< StaticInst >
PowerISA::Decoder::Decoder
Decoder(ISA *isa=nullptr)
Definition: decoder.hh:49
PowerISA::Decoder::takeOverFrom
void takeOverFrom(Decoder *old)
Definition: decoder.hh:93
MipsISA::ExtMachInst
uint64_t ExtMachInst
Definition: types.hh:39

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