gem5
v20.1.0.0
systemc
ext
dt
bit
sc_lv.hh
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Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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more contributor license agreements. See the NOTICE file distributed
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Accellera licenses this file to you under the Apache License, Version 2.0
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implied. See the License for the specific language governing
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/*****************************************************************************
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sc_lv.h -- Arbitrary size logic vector class.
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Original Author: Gene Bushuyev, Synopsys, Inc.
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*****************************************************************************/
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/*****************************************************************************
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MODIFICATION LOG - modifiers, enter your name, affiliation, date and
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changes you are making here.
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Name, Affiliation, Date:
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Description of Modification:
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*****************************************************************************/
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// $Log: sc_lv.h,v $
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// Revision 1.1.1.1 2006/12/15 20:20:04 acg
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// SystemC 2.3
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//
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// Revision 1.3 2006/01/13 18:53:53 acg
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// Andy Goodrich: added $Log command so that CVS comments are reproduced in
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// the source.
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//
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#ifndef __SYSTEMC_EXT_DT_BIT_SC_LV_HH__
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#define __SYSTEMC_EXT_DT_BIT_SC_LV_HH__
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#include "
sc_lv_base.hh
"
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namespace
sc_dt
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{
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// classes defined in this module
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template
<
int
W>
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class
sc_lv;
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// ----------------------------------------------------------------------------
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// CLASS TEMPLATE : sc_lv<W>
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//
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// Arbitrary size logic vector class.
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// ----------------------------------------------------------------------------
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template
<
int
W>
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class
sc_lv :
public
sc_lv_base
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{
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public
:
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// constructors
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sc_lv
() : sc_lv_base(W) {}
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explicit
sc_lv
(
const
sc_logic &init_value) : sc_lv_base(init_value, W) {}
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explicit
sc_lv
(
bool
init_value) : sc_lv_base(sc_logic(init_value), W) {}
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explicit
sc_lv
(
char
init_value) : sc_lv_base(sc_logic(init_value), W) {}
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sc_lv
(
const
char
*
a
) : sc_lv_base(W) {
sc_lv_base::operator =
(
a
); }
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sc_lv
(
const
bool
*
a
) : sc_lv_base(W) {
sc_lv_base::operator =
(
a
); }
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sc_lv
(
const
sc_logic *
a
) : sc_lv_base(W) {
sc_lv_base::operator =
(
a
); }
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sc_lv
(
const
sc_unsigned &
a
) : sc_lv_base(W) {
sc_lv_base::operator =
(
a
); }
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sc_lv
(
const
sc_signed &
a
) : sc_lv_base(W) {
sc_lv_base::operator =
(
a
); }
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sc_lv
(
const
sc_uint_base &
a
) : sc_lv_base(W)
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{
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sc_lv_base::operator =
(
a
);
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}
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sc_lv
(
const
sc_int_base &
a
) : sc_lv_base(W) {
sc_lv_base::operator =
(
a
); }
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sc_lv
(
unsigned
long
a
) : sc_lv_base(W) {
sc_lv_base::operator =
(
a
); }
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sc_lv
(
long
a
) : sc_lv_base(W) {
sc_lv_base::operator =
(
a
); }
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sc_lv
(
unsigned
int
a
) : sc_lv_base(W) {
sc_lv_base::operator =
(
a
); }
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sc_lv
(
int
a
) : sc_lv_base(W) {
sc_lv_base::operator =
(
a
); }
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sc_lv
(
uint64
a
) : sc_lv_base(W) {
sc_lv_base::operator =
(
a
); }
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sc_lv
(
int64
a
) : sc_lv_base(W) {
sc_lv_base::operator =
(
a
); }
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template
<
class
X>
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sc_lv
(
const
sc_proxy<X> &
a
) : sc_lv_base(W) {
sc_lv_base::operator =
(
a
); }
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sc_lv
(
const
sc_lv<W> &
a
) : sc_lv_base(
a
) {}
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// assignment operators
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template
<
class
X>
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sc_lv<W> &
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operator =
(
const
sc_proxy<X> &
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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sc_lv<W>
&
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operator =
(
const
sc_lv<W>
&
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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sc_lv<W>
&
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operator =
(
const
char
*
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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sc_lv<W>
&
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operator =
(
const
bool
*
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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sc_lv<W>
&
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operator =
(
const
sc_logic
*
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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sc_lv<W>
&
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operator =
(
const
sc_unsigned
&
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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sc_lv<W>
&
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operator =
(
const
sc_signed
&
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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sc_lv<W>
&
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operator =
(
const
sc_uint_base
&
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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sc_lv<W>
&
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operator =
(
const
sc_int_base
&
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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sc_lv<W>
&
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operator =
(
unsigned
long
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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sc_lv<W>
&
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operator =
(
long
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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sc_lv<W>
&
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operator =
(
unsigned
int
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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sc_lv<W>
&
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operator =
(
int
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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sc_lv<W>
&
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operator =
(
uint64
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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sc_lv<W>
&
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operator =
(
int64
a
)
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{
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sc_lv_base::operator =
(
a
);
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return
*
this
;
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}
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};
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}
// namespace sc_dt
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#endif // __SYSTEMC_EXT_DT_BIT_SC_LV_HH__
sc_dt::sc_lv::operator=
sc_lv< W > & operator=(const sc_proxy< X > &a)
Definition:
sc_lv.hh:129
sc_dt
Definition:
sc_bit.cc:67
sc_dt::sc_lv_base::operator=
sc_lv_base & operator=(const sc_proxy< X > &a)
Definition:
sc_lv_base.hh:163
sc_dt::sc_int_base
Definition:
sc_int_base.hh:494
sc_dt::sc_signed
Definition:
sc_signed.hh:984
sc_dt::sc_logic
Definition:
sc_logic.hh:130
sc_dt::sc_lv
Definition:
sc_in_rv.hh:41
ArmISA::a
Bitfield< 8 > a
Definition:
miscregs_types.hh:62
sc_dt::sc_lv::sc_lv
sc_lv()
Definition:
sc_lv.hh:102
sc_dt::uint64
uint64_t uint64
Definition:
sc_nbdefs.hh:206
sc_dt::int64
int64_t int64
Definition:
sc_nbdefs.hh:205
sc_dt::sc_uint_base
Definition:
sc_uint_base.hh:465
sc_dt::sc_unsigned
Definition:
sc_unsigned.hh:890
sc_lv_base.hh
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