gem5  v20.1.0.0
traits.hh
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37 
38 /* Auxiliary structs for architecture traits. */
39 
40 #ifndef __ARCH_COMMON_TRAITS_HH__
41 #define __ARCH_COMMON_TRAITS_HH__
42 
43 #include "arch/generic/isa.hh"
44 #include "arch/types.hh"
45 #include "enums/VecRegRenameMode.hh"
46 
52 template <typename ISA>
53 struct RenameMode
54 {
55  static Enums::VecRegRenameMode init(const BaseISA*) { return Enums::Full; }
56 
57  static Enums::VecRegRenameMode
59  { return Enums::Full; }
60 
65  static bool equalsInit(const BaseISA*, const BaseISA*) { return true; }
66 };
67 
68 #endif /* __ARCH_COMMON_TRAITS_HH__ */
RenameMode::equalsInit
static bool equalsInit(const BaseISA *, const BaseISA *)
Compare the initial rename mode of two instances of the ISA.
Definition: traits.hh:65
RenameMode::mode
static Enums::VecRegRenameMode mode(const TheISA::PCState &)
Definition: traits.hh:58
RenameMode
Helper structure to get the vector register mode for a given ISA.
Definition: traits.hh:53
RenameMode::init
static Enums::VecRegRenameMode init(const BaseISA *)
Definition: traits.hh:55
isa.hh
MipsISA::PCState
GenericISA::DelaySlotPCState< MachInst > PCState
Definition: types.hh:41
BaseISA
Definition: isa.hh:47

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