gem5  v20.1.0.5
•All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Modules Pages
HSAPacketProcessor Member List

This is the complete list of members for HSAPacketProcessor, including all inherited members.

_drainManagerDrainableprivate
_drainStateDrainablemutableprivate
_paramsSimObjectprotected
addStat(Stats::Info *info)Stats::Group
addStatGroup(const char *name, Group *block)Stats::Group
cacheBlockSize() constDmaDeviceinline
clockDomainClockedprivate
Clocked(ClockDomain &clk_domain)Clockedinlineprotected
Clocked(Clocked &)=deleteClockedprotected
clockEdge(Cycles cycles=Cycles(0)) constClockedinline
ClockedObject(const ClockedObjectParams *p)ClockedObject
clockPeriod() constClockedinline
clockPeriodUpdated()Clockedinlineprotectedvirtual
curCycle() constClockedinline
currentSection()Serializablestatic
cycleClockedmutableprivate
cyclesToTicks(Cycles c) constClockedinline
deschedule(Event &event)EventManagerinline
deschedule(Event *event)EventManagerinline
displayQueueDescriptor(int pid, uint32_t rl_idx)HSAPacketProcessorprotected
DmaDevice(const Params *p)DmaDevice
DmaFnPtr typedefHSAPacketProcessorprotected
dmaPending() constDmaDeviceinline
dmaPortDmaDeviceprotected
dmaRead(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)DmaDeviceinline
dmaRead(Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)DmaDeviceinline
dmaReadVirt(Addr host_addr, unsigned size, Event *event, void *data, Tick delay=0)HSAPacketProcessorprotected
dmaVirt(DmaFnPtr, Addr host_addr, unsigned size, Event *event, void *data, Tick delay=0)HSAPacketProcessorprotected
dmaWrite(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)DmaDeviceinline
dmaWrite(Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)DmaDeviceinline
dmaWriteVirt(Addr host_addr, unsigned size, Event *event, void *data, Tick delay=0)HSAPacketProcessorprotected
dmDrain()Drainableprivate
dmDrainResume()Drainableprivate
drain() overrideSimObjectinlinevirtual
Drainable()Drainableprotected
drainResume()Drainableinlineprotectedvirtual
drainState() constDrainableinline
EventManager(EventManager &em)EventManagerinline
EventManager(EventManager *em)EventManagerinline
EventManager(EventQueue *eq)EventManagerinline
eventqEventManagerprotected
eventQueue() constEventManagerinline
find(const char *name)SimObjectstatic
finishPkt(void *pkt, uint32_t rl_idx)HSAPacketProcessor
finishPkt(void *pkt)HSAPacketProcessorinline
frequency() constClockedinline
getAddrRanges() constHSAPacketProcessorvirtual
getCommandsFromHost(int pid, uint32_t rl_idx)HSAPacketProcessor
getPort(const std::string &if_name, PortID idx=InvalidPortID) overrideDmaDevicevirtual
getProbeManager()SimObject
getQueueDesc(uint32_t queId)HSAPacketProcessorinline
getRegdListEntry(uint32_t queId)HSAPacketProcessorinline
getStatGroups() constStats::Group
getStats() constStats::Group
Group()=deleteStats::Group
Group(const Group &)=deleteStats::Group
Group(Group *parent, const char *name=nullptr)Stats::Group
hsa_deviceHSAPacketProcessorprotected
HSAPacketProcessor(const Params *p)HSAPacketProcessor
hwSchdlrHSAPacketProcessorprotected
HWScheduler classHSAPacketProcessorfriend
init() overrideDmaDevicevirtual
initState()SimObjectvirtual
loadState(CheckpointIn &cp)SimObjectvirtual
memInvalidate()SimObjectinlinevirtual
memWriteback()SimObjectinlinevirtual
mergedParentStats::Groupprivate
mergedStatGroupsStats::Groupprivate
mergeStatGroup(Group *block)Stats::Groupprivate
name() constSimObjectinlinevirtual
nextCycle() constClockedinline
notifyFork()Drainableinlinevirtual
numHWQueuesHSAPacketProcessor
SimObject::operator=(const Group &)=deleteStats::Group
Clocked::operator=(Clocked &)=deleteClockedprotected
Params typedefHSAPacketProcessor
params() constPioDeviceinline
pathSerializableprivatestatic
pioAddrHSAPacketProcessor
pioDelayHSAPacketProcessor
PioDevice(const Params *p)PioDevice
pioPortPioDeviceprotected
pioSizeHSAPacketProcessor
pktProcessDelayHSAPacketProcessor
powerStateClockedObject
preDumpStats()Stats::Groupvirtual
probeManagerSimObjectprivate
processPkt(void *pkt, uint32_t rl_idx, Addr host_pkt_addr)HSAPacketProcessorprotected
read(Packet *)HSAPacketProcessorvirtual
DmaDevice::read(PacketPtr pkt)=0PioDeviceprotectedpure virtual
regdQListHSAPacketProcessorprotected
regProbeListeners()SimObjectvirtual
regProbePoints()SimObjectvirtual
regStats()Stats::Groupvirtual
reschedule(Event &event, Tick when, bool always=false)EventManagerinline
reschedule(Event *event, Tick when, bool always=false)EventManagerinline
resetClock() constClockedinlineprotected
resetStats()Stats::Groupvirtual
resolveStat(std::string name) constStats::Group
schedAQLProcessing(uint32_t rl_idx)HSAPacketProcessor
schedAQLProcessing(uint32_t rl_idx, Tick delay)HSAPacketProcessor
schedule(Event &event, Tick when)EventManagerinline
schedule(Event *event, Tick when)EventManagerinline
Serializable()Serializable
serialize(CheckpointOut &cp) const overrideClockedObjectvirtual
serializeAll(CheckpointOut &cp)SimObjectstatic
Serializable::serializeAll(const std::string &cpt_dir)Serializablestatic
serializeSection(CheckpointOut &cp, const char *name) constSerializable
serializeSection(CheckpointOut &cp, const std::string &name) constSerializableinline
setCurTick(Tick newVal)EventManagerinline
setDevice(HSADevice *dev)HSAPacketProcessor
setDeviceQueueDesc(uint64_t hostReadIndexPointer, uint64_t basePointer, uint64_t queue_id, uint32_t size)HSAPacketProcessor
signalDrainDone() constDrainableinlineprotected
SimObject(const Params *_params)SimObject
SimObjectList typedefSimObjectprivate
simObjectListSimObjectprivatestatic
startup()SimObjectvirtual
statGroupsStats::Groupprivate
statsStats::Groupprivate
sysPioDeviceprotected
tickClockedmutableprivate
ticksToCycles(Tick t) constClockedinline
translateOrDie(Addr vaddr, Addr &paddr)HSAPacketProcessorprotected
unserialize(CheckpointIn &cp) overrideClockedObjectvirtual
unserializeGlobals(CheckpointIn &cp)Serializablestatic
unserializeSection(CheckpointIn &cp, const char *name)Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)Serializableinline
unsetDeviceQueueDesc(uint64_t queue_id)HSAPacketProcessor
update() constClockedinlineprivate
updateClockPeriod()Clockedinline
updateReadIndex(int, uint32_t)HSAPacketProcessor
voltage() constClockedinline
wakeupEventQueue(Tick when=(Tick) -1)EventManagerinline
write(Packet *)HSAPacketProcessorvirtual
DmaDevice::write(PacketPtr pkt)=0PioDeviceprotectedpure virtual
~Clocked()Clockedinlineprotectedvirtual
~DmaDevice()DmaDeviceinlinevirtual
~Drainable()Drainableprotectedvirtual
~Group()Stats::Groupvirtual
~HSAPacketProcessor()HSAPacketProcessor
~PioDevice()PioDevicevirtual
~Serializable()Serializablevirtual
~SimObject()SimObjectvirtual
Generated on Thu Mar 18 2021 12:09:27 for gem5 by doxygen 1.8.17