gem5  v20.1.0.5
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IdeController Member List

This is the complete list of members for IdeController, including all inherited members.

_busAddrPciDeviceprotected
_drainManagerDrainableprivate
_drainStateDrainablemutableprivate
_paramsSimObjectprotected
activeIdeControllerprivate
addStat(Stats::Info *info)Stats::Group
addStatGroup(const char *name, Group *block)Stats::Group
BARAddrsPciDeviceprotected
BARSizePciDeviceprotected
BitUnion8(BMIStatusReg) Bitfield< 6 > dmaCap0IdeControllerprivate
bmEnabledIdeControllerprivate
bmiAddrIdeControllerprivate
bmiSizeIdeControllerprivate
busAddr() constPciDeviceinline
cacheBlockSize() constDmaDeviceinline
clockDomainClockedprivate
Clocked(ClockDomain &clk_domain)Clockedinlineprotected
Clocked(Clocked &)=deleteClockedprotected
clockEdge(Cycles cycles=Cycles(0)) constClockedinline
ClockedObject(const ClockedObjectParams *p)ClockedObject
clockPeriod() constClockedinline
clockPeriodUpdated()Clockedinlineprotectedvirtual
configPciDeviceprotected
configDelayPciDeviceprotected
ctrlOffsetIdeControllerprivate
curCycle() constClockedinline
currentSection()Serializablestatic
cycleClockedmutableprivate
cyclesToTicks(Cycles c) constClockedinline
deschedule(Event &event)EventManagerinline
deschedule(Event *event)EventManagerinline
deviceTimingIdeControllerprivate
dispatchAccess(PacketPtr pkt, bool read)IdeControllerprivate
dmaCap1IdeControllerprivate
DmaDevice(const Params *p)DmaDevice
dmaErrorIdeControllerprivate
dmaPending() constDmaDeviceinline
dmaPortDmaDeviceprotected
dmaRead(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)DmaDeviceinline
dmaRead(Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)DmaDeviceinline
dmaWrite(Addr addr, int size, Event *event, uint8_t *data, uint32_t sid, uint32_t ssid, Tick delay=0)DmaDeviceinline
dmaWrite(Addr addr, int size, Event *event, uint8_t *data, Tick delay=0)DmaDeviceinline
dmDrain()Drainableprivate
dmDrainResume()Drainableprivate
drain() overrideSimObjectinlinevirtual
Drainable()Drainableprotected
drainResume()Drainableinlineprotectedvirtual
drainState() constDrainableinline
EndBitUnion(BMIStatusReg) BitUnion8(BMICommandReg) Bitfield< 3 > rwIdeControllerprivate
EndBitUnion(BMICommandReg) struct ChannelIdeControllerinlineprivate
EventManager(EventManager &em)EventManagerinline
EventManager(EventManager *em)EventManagerinline
EventManager(EventQueue *eq)EventManagerinline
eventqEventManagerprotected
eventQueue() constEventManagerinline
find(const char *name)SimObjectstatic
frequency() constClockedinline
getAddrRanges() const overridePciDevicevirtual
getBAR(Addr addr)PciDeviceinlineprotected
getBAR(Addr addr, int &bar, Addr &offs)PciDeviceinlineprotected
getPort(const std::string &if_name, PortID idx=InvalidPortID) overrideDmaDevicevirtual
getProbeManager()SimObject
getStatGroups() constStats::Group
getStats() constStats::Group
Group()=deleteStats::Group
Group(const Group &)=deleteStats::Group
Group(Group *parent, const char *name=nullptr)Stats::Group
hostInterfacePciDeviceprotected
ideConfigIdeControllerprivate
IdeController(Params *p)IdeController
init() overrideDmaDevicevirtual
initState()SimObjectvirtual
interruptLine() constPciDeviceinline
intrClear()PciDeviceinline
intrPost()IdeController
intStatusIdeControllerprivate
ioEnabledIdeControllerprivate
ioShiftIdeControllerprivate
isBAR(Addr addr, int bar) constPciDeviceinlineprotected
isDiskSelected(IdeDisk *diskPtr)IdeController
isLargeBAR(int bar) constPciDeviceinlineprotected
legacyIOPciDeviceprotected
loadState(CheckpointIn &cp)SimObjectvirtual
memInvalidate()SimObjectinlinevirtual
memWriteback()SimObjectinlinevirtual
mergedParentStats::Groupprivate
mergedStatGroupsStats::Groupprivate
mergeStatGroup(Group *block)Stats::Groupprivate
msicapPciDeviceprotected
MSICAP_BASEPciDeviceprotected
msix_pbaPciDeviceprotected
MSIX_PBA_ENDPciDeviceprotected
MSIX_PBA_OFFSETPciDeviceprotected
msix_tablePciDeviceprotected
MSIX_TABLE_ENDPciDeviceprotected
MSIX_TABLE_OFFSETPciDeviceprotected
msixcapPciDeviceprotected
MSIXCAP_BASEPciDeviceprotected
MSIXCAP_ID_OFFSETPciDeviceprotected
MSIXCAP_MPBA_OFFSETPciDeviceprotected
MSIXCAP_MTAB_OFFSETPciDeviceprotected
MSIXCAP_MXC_OFFSETPciDeviceprotected
name() constSimObjectinlinevirtual
nextCycle() constClockedinline
notifyFork()Drainableinlinevirtual
SimObject::operator=(const Group &)=deleteStats::Group
Clocked::operator=(Clocked &)=deleteClockedprotected
params() constIdeControllerinline
Params typedefIdeController
pathSerializableprivatestatic
PciDevice(const PciDeviceParams *params)PciDevice
pciToDma(Addr pci_addr) constPciDeviceinline
pioDelayPciDeviceprotected
PioDevice(const Params *p)PioDevice
pioPortPioDeviceprotected
pmcapPciDeviceprotected
PMCAP_BASEPciDeviceprotected
PMCAP_ID_OFFSETPciDeviceprotected
PMCAP_PC_OFFSETPciDeviceprotected
PMCAP_PMCS_OFFSETPciDeviceprotected
powerStateClockedObject
preDumpStats()Stats::Groupvirtual
primaryIdeControllerprivate
primaryTimingIdeControllerprivate
probeManagerSimObjectprivate
pxcapPciDeviceprotected
PXCAP_BASEPciDeviceprotected
read(PacketPtr pkt) overrideIdeControllervirtual
readConfig(PacketPtr pkt) overrideIdeControllervirtual
regProbeListeners()SimObjectvirtual
regProbePoints()SimObjectvirtual
regStats()Stats::Groupvirtual
reschedule(Event &event, Tick when, bool always=false)EventManagerinline
reschedule(Event *event, Tick when, bool always=false)EventManagerinline
resetClock() constClockedinlineprotected
resetStats()Stats::Groupvirtual
resolveStat(std::string name) constStats::Group
schedule(Event &event, Tick when)EventManagerinline
schedule(Event *event, Tick when)EventManagerinline
secondaryIdeControllerprivate
secondaryTimingIdeControllerprivate
Serializable()Serializable
serialize(CheckpointOut &cp) const overrideIdeControllervirtual
serializeAll(CheckpointOut &cp)SimObjectstatic
Serializable::serializeAll(const std::string &cpt_dir)Serializablestatic
serializeSection(CheckpointOut &cp, const char *name) constSerializable
serializeSection(CheckpointOut &cp, const std::string &name) constSerializableinline
setCurTick(Tick newVal)EventManagerinline
setDmaComplete(IdeDisk *disk)IdeController
signalDrainDone() constDrainableinlineprotected
SimObject(const Params *_params)SimObject
SimObjectList typedefSimObjectprivate
simObjectListSimObjectprivatestatic
startStopIdeControllerprivate
startup()SimObjectvirtual
statGroupsStats::Groupprivate
statsStats::Groupprivate
sysPioDeviceprotected
tickClockedmutableprivate
ticksToCycles(Tick t) constClockedinline
udmaControlIdeControllerprivate
udmaTimingIdeControllerprivate
unserialize(CheckpointIn &cp) overrideIdeControllervirtual
unserializeGlobals(CheckpointIn &cp)Serializablestatic
unserializeSection(CheckpointIn &cp, const char *name)Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)Serializableinline
update() constClockedinlineprivate
updateClockPeriod()Clockedinline
voltage() constClockedinline
wakeupEventQueue(Tick when=(Tick) -1)EventManagerinline
write(PacketPtr pkt) overrideIdeControllervirtual
writeConfig(PacketPtr pkt) overrideIdeControllervirtual
~Clocked()Clockedinlineprotectedvirtual
~DmaDevice()DmaDeviceinlinevirtual
~Drainable()Drainableprotectedvirtual
~Group()Stats::Groupvirtual
~PioDevice()PioDevicevirtual
~Serializable()Serializablevirtual
~SimObject()SimObjectvirtual

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