gem5
v21.1.0.0
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#include <mmu.hh>
Public Types | |
enum | TLBType { I_TLBS = 0x01, D_TLBS = 0x10, ALL_TLBS = 0x11 } |
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enum | Mode { Read, Write, Execute } |
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typedef SimObjectParams | Params |
Public Member Functions | |
MMU (const ArmMMUParams &p) | |
void | init () override |
init() is called after all C++ SimObjects have been created and all ports are connected. More... | |
bool | translateFunctional (ThreadContext *tc, Addr vaddr, Addr &paddr) |
Fault | translateFunctional (const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode, TLB::ArmTranslationType tran_type) |
Fault | translateFunctional (const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode, TLB::ArmTranslationType tran_type, bool stage2) |
Fault | translateAtomic (const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode, bool stage2) |
void | translateTiming (const RequestPtr &req, ThreadContext *tc, BaseMMU::Translation *translation, BaseMMU::Mode mode, bool stage2) |
void | invalidateMiscReg (TLBType type=ALL_TLBS) |
template<typename OP > | |
void | flush (const OP &tlbi_op) |
template<typename OP > | |
void | flushStage1 (const OP &tlbi_op) |
template<typename OP > | |
void | flushStage2 (const OP &tlbi_op) |
template<typename OP > | |
void | iflush (const OP &tlbi_op) |
template<typename OP > | |
void | dflush (const OP &tlbi_op) |
void | flushAll () override |
uint64_t | getAttr () const |
Fault | translateAtomic (const RequestPtr &req, ThreadContext *tc, Mode mode) |
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void | demapPage (Addr vaddr, uint64_t asn) |
Fault | translateAtomic (const RequestPtr &req, ThreadContext *tc, Mode mode) |
void | translateTiming (const RequestPtr &req, ThreadContext *tc, Translation *translation, Mode mode) |
Fault | translateFunctional (const RequestPtr &req, ThreadContext *tc, Mode mode) |
Fault | finalizePhysical (const RequestPtr &req, ThreadContext *tc, Mode mode) const |
virtual void | takeOverFrom (BaseMMU *old_mmu) |
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const Params & | params () const |
SimObject (const Params &p) | |
virtual | ~SimObject () |
virtual void | loadState (CheckpointIn &cp) |
loadState() is called on each SimObject when restoring from a checkpoint. More... | |
virtual void | initState () |
initState() is called on each SimObject when not restoring from a checkpoint. More... | |
virtual void | regProbePoints () |
Register probe points for this object. More... | |
virtual void | regProbeListeners () |
Register probe listeners for this object. More... | |
ProbeManager * | getProbeManager () |
Get the probe manager for this object. More... | |
virtual Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) |
Get a port with a given name and index. More... | |
virtual void | startup () |
startup() is the final initialization call before simulation. More... | |
DrainState | drain () override |
Provide a default implementation of the drain interface for objects that don't need draining. More... | |
virtual void | memWriteback () |
Write back dirty buffers to memory using functional writes. More... | |
virtual void | memInvalidate () |
Invalidate the contents of memory buffers. More... | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
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EventQueue * | eventQueue () const |
void | schedule (Event &event, Tick when) |
void | deschedule (Event &event) |
void | reschedule (Event &event, Tick when, bool always=false) |
void | schedule (Event *event, Tick when) |
void | deschedule (Event *event) |
void | reschedule (Event *event, Tick when, bool always=false) |
void | wakeupEventQueue (Tick when=(Tick) -1) |
This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More... | |
void | setCurTick (Tick newVal) |
EventManager (EventManager &em) | |
Event manger manages events in the event queue. More... | |
EventManager (EventManager *em) | |
EventManager (EventQueue *eq) | |
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Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. More... | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. More... | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
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DrainState | drainState () const |
Return the current drain state of an object. More... | |
virtual void | notifyFork () |
Notify a child process of a fork. More... | |
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Group (Group *parent, const char *name=nullptr) | |
Construct a new statistics group. More... | |
virtual | ~Group () |
virtual void | regStats () |
Callback to set stat parameters. More... | |
virtual void | resetStats () |
Callback to reset stats. More... | |
virtual void | preDumpStats () |
Callback before stats are dumped. More... | |
void | addStat (statistics::Info *info) |
Register a stat with this group. More... | |
const std::map< std::string, Group * > & | getStatGroups () const |
Get all child groups associated with this object. More... | |
const std::vector< Info * > & | getStats () const |
Get all stats associated with this object. More... | |
void | addStatGroup (const char *name, Group *block) |
Add a stat block as a child of this block. More... | |
const Info * | resolveStat (std::string name) const |
Resolve a stat by its name within this group. More... | |
void | mergeStatGroup (Group *block) |
Merge the contents (stats & children) of a block to this block. More... | |
Group ()=delete | |
Group (const Group &)=delete | |
Group & | operator= (const Group &)=delete |
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Named (const std::string &name_) | |
virtual | ~Named ()=default |
virtual std::string | name () const |
Protected Member Functions | |
ArmISA::TLB * | getDTBPtr () const |
ArmISA::TLB * | getITBPtr () const |
TLB * | getTlb (BaseMMU::Mode mode, bool stage2) const |
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BaseMMU (const Params &p) | |
BaseTLB * | getTlb (Mode mode) const |
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Drainable () | |
virtual | ~Drainable () |
virtual void | drainResume () |
Resume execution after a successful drain. More... | |
void | signalDrainDone () const |
Signal that an object is drained. More... | |
Protected Attributes | |
TLB * | itbStage2 |
TLB * | dtbStage2 |
TableWalker * | itbWalker |
TableWalker * | dtbWalker |
TableWalker * | itbStage2Walker |
TableWalker * | dtbStage2Walker |
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const SimObjectParams & | _params |
Cached copy of the object parameters. More... | |
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EventQueue * | eventq |
A pointer to this object's event queue. More... | |
Additional Inherited Members | |
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static void | serializeAll (const std::string &cpt_dir) |
Create a checkpoint by serializing all SimObjects in the system. More... | |
static SimObject * | find (const char *name) |
Find the SimObject with the given name and return a pointer to it. More... | |
static void | setSimObjectResolver (SimObjectResolver *resolver) |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More... | |
static SimObjectResolver * | getSimObjectResolver () |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More... | |
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static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. More... | |
static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
Generate a checkpoint file so that the serialization can be routed to it. More... | |
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BaseTLB * | dtb |
BaseTLB * | itb |
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typedef BaseMMUParams | Params |
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inline |
Definition at line 145 of file mmu.hh.
References gem5::ArmISA::TLB::flush(), and getDTBPtr().
Referenced by flushStage1(), gem5::ArmISA::DTLBIALL::operator()(), gem5::ArmISA::DTLBIASID::operator()(), and gem5::ArmISA::DTLBIMVA::operator()().
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inline |
Definition at line 109 of file mmu.hh.
References flushStage1(), and flushStage2().
Referenced by gem5::ArmISA::TLBIALL::operator()(), gem5::ArmISA::TLBIALLEL::operator()(), gem5::ArmISA::TLBIVMALL::operator()(), and gem5::ArmISA::TLBIALLN::operator()().
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inlineoverridevirtual |
Reimplemented from gem5::BaseMMU.
Definition at line 151 of file mmu.hh.
References dtbStage2, gem5::BaseMMU::flushAll(), gem5::ArmISA::TLB::flushAll(), and itbStage2.
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inline |
Definition at line 122 of file mmu.hh.
References dflush(), and iflush().
Referenced by flush(), gem5::ArmISA::TLBIASID::operator()(), gem5::ArmISA::TLBIMVAA::operator()(), and gem5::ArmISA::TLBIMVA::operator()().
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inline |
Definition at line 130 of file mmu.hh.
References dtbStage2, gem5::ArmISA::TLB::flush(), and itbStage2.
Referenced by flush(), and gem5::ArmISA::TLBIIPA::operator()().
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inline |
Definition at line 159 of file mmu.hh.
References gem5::ArmISA::TLB::getAttr(), and getDTBPtr().
Referenced by gem5::ArmISA::ISA::addressTranslation(), and gem5::ArmISA::ISA::addressTranslation64().
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inlineprotected |
Definition at line 55 of file mmu.hh.
References gem5::BaseMMU::dtb.
Referenced by dflush(), getAttr(), getTlb(), init(), invalidateMiscReg(), and translateFunctional().
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inlineprotected |
Definition at line 61 of file mmu.hh.
References gem5::BaseMMU::itb.
Referenced by getTlb(), iflush(), init(), and invalidateMiscReg().
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Definition at line 73 of file mmu.cc.
References dtbStage2, gem5::BaseMMU::Execute, getDTBPtr(), getITBPtr(), itbStage2, and gem5::ArmISA::mode.
Referenced by translateAtomic(), translateFunctional(), and translateTiming().
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inline |
Definition at line 138 of file mmu.hh.
References gem5::ArmISA::TLB::flush(), and getITBPtr().
Referenced by flushStage1(), gem5::ArmISA::ITLBIALL::operator()(), gem5::ArmISA::ITLBIASID::operator()(), and gem5::ArmISA::ITLBIMVA::operator()().
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overridevirtual |
init() is called after all C++ SimObjects have been created and all ports are connected.
Initializations that are independent of unserialization but rely on a fully instantiated and connected SimObject graph should be done here.
Reimplemented from gem5::SimObject.
Definition at line 56 of file mmu.cc.
References dtbStage2, dtbStage2Walker, dtbWalker, getDTBPtr(), getITBPtr(), itbStage2, itbStage2Walker, itbWalker, gem5::ArmISA::TableWalker::setMmu(), gem5::ArmISA::TLB::setStage2Tlb(), and gem5::ArmISA::TLB::setTableWalker().
Definition at line 125 of file mmu.cc.
References getDTBPtr(), getITBPtr(), gem5::ArmISA::TLB::invalidateMiscReg(), and gem5::X86ISA::type.
Referenced by gem5::ArmISA::ISA::clear(), and gem5::ArmISA::ISA::setMiscReg().
Fault gem5::MMU::translateAtomic | ( | const RequestPtr & | req, |
ThreadContext * | tc, | ||
BaseMMU::Mode | mode, | ||
bool | stage2 | ||
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Definition at line 111 of file mmu.cc.
References getTlb(), gem5::ArmISA::mode, and gem5::ArmISA::TLB::translateAtomic().
Referenced by gem5::ArmISA::TableWalker::readDataUntimed(), and gem5::Trace::TarmacParserRecord::readMemNoEffect().
Fault gem5::MMU::translateFunctional | ( | const RequestPtr & | req, |
ThreadContext * | tc, | ||
BaseMMU::Mode | mode, | ||
TLB::ArmTranslationType | tran_type | ||
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Definition at line 95 of file mmu.cc.
References gem5::ArmISA::mode, and translateFunctional().
Fault gem5::MMU::translateFunctional | ( | const RequestPtr & | req, |
ThreadContext * | tc, | ||
BaseMMU::Mode | mode, | ||
TLB::ArmTranslationType | tran_type, | ||
bool | stage2 | ||
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Definition at line 102 of file mmu.cc.
References getTlb(), gem5::ArmISA::mode, and gem5::ArmISA::TLB::translateFunctional().
bool gem5::MMU::translateFunctional | ( | ThreadContext * | tc, |
Addr | vaddr, | ||
Addr & | paddr | ||
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Definition at line 89 of file mmu.cc.
References getDTBPtr(), gem5::ArmISA::TLB::translateFunctional(), and gem5::MipsISA::vaddr.
Referenced by gem5::ArmISA::ISA::addressTranslation(), gem5::ArmISA::ISA::addressTranslation64(), gem5::ArmISA::TableWalker::readDataUntimed(), gem5::Trace::TarmacTracerRecordV8::TraceMemEntryV8::TraceMemEntryV8(), and translateFunctional().
void gem5::MMU::translateTiming | ( | const RequestPtr & | req, |
ThreadContext * | tc, | ||
BaseMMU::Translation * | translation, | ||
BaseMMU::Mode | mode, | ||
bool | stage2 | ||
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Definition at line 118 of file mmu.cc.
References getTlb(), gem5::ArmISA::mode, and gem5::ArmISA::TLB::translateTiming().
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Definition at line 70 of file mmu.hh.
Referenced by flushAll(), flushStage2(), getTlb(), and init().
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Definition at line 69 of file mmu.hh.
Referenced by flushAll(), flushStage2(), getTlb(), and init().
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