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gem5::ArmISA::MMU Class Reference

#include <mmu.hh>

Inheritance diagram for gem5::ArmISA::MMU:
gem5::BaseMMU gem5::SimObject gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named

Public Types

enum  TLBType { I_TLBS = 0x01, D_TLBS = 0x10, ALL_TLBS = 0x11 }
 
- Public Types inherited from gem5::BaseMMU
enum  Mode { Read, Write, Execute }
 
- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 

Public Member Functions

 MMU (const ArmMMUParams &p)
 
void init () override
 init() is called after all C++ SimObjects have been created and all ports are connected. More...
 
bool translateFunctional (ThreadContext *tc, Addr vaddr, Addr &paddr)
 
Fault translateFunctional (const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode, TLB::ArmTranslationType tran_type)
 
Fault translateFunctional (const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode, TLB::ArmTranslationType tran_type, bool stage2)
 
Fault translateAtomic (const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode, bool stage2)
 
void translateTiming (const RequestPtr &req, ThreadContext *tc, BaseMMU::Translation *translation, BaseMMU::Mode mode, bool stage2)
 
void invalidateMiscReg (TLBType type=ALL_TLBS)
 
template<typename OP >
void flush (const OP &tlbi_op)
 
template<typename OP >
void flushStage1 (const OP &tlbi_op)
 
template<typename OP >
void flushStage2 (const OP &tlbi_op)
 
template<typename OP >
void iflush (const OP &tlbi_op)
 
template<typename OP >
void dflush (const OP &tlbi_op)
 
void flushAll () override
 
uint64_t getAttr () const
 
Fault translateAtomic (const RequestPtr &req, ThreadContext *tc, Mode mode)
 
- Public Member Functions inherited from gem5::BaseMMU
void demapPage (Addr vaddr, uint64_t asn)
 
Fault translateAtomic (const RequestPtr &req, ThreadContext *tc, Mode mode)
 
void translateTiming (const RequestPtr &req, ThreadContext *tc, Translation *translation, Mode mode)
 
Fault translateFunctional (const RequestPtr &req, ThreadContext *tc, Mode mode)
 
Fault finalizePhysical (const RequestPtr &req, ThreadContext *tc, Mode mode) const
 
virtual void takeOverFrom (BaseMMU *old_mmu)
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint. More...
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint. More...
 
virtual void regProbePoints ()
 Register probe points for this object. More...
 
virtual void regProbeListeners ()
 Register probe listeners for this object. More...
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object. More...
 
virtual PortgetPort (const std::string &if_name, PortID idx=InvalidPortID)
 Get a port with a given name and index. More...
 
virtual void startup ()
 startup() is the final initialization call before simulation. More...
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining. More...
 
virtual void memWriteback ()
 Write back dirty buffers to memory using functional writes. More...
 
virtual void memInvalidate ()
 Invalidate the contents of memory buffers. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue. More...
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object. More...
 
virtual void notifyFork ()
 Notify a child process of a fork. More...
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group. More...
 
virtual ~Group ()
 
virtual void regStats ()
 Callback to set stat parameters. More...
 
virtual void resetStats ()
 Callback to reset stats. More...
 
virtual void preDumpStats ()
 Callback before stats are dumped. More...
 
void addStat (statistics::Info *info)
 Register a stat with this group. More...
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object. More...
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object. More...
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block. More...
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group. More...
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block. More...
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 

Protected Member Functions

ArmISA::TLBgetDTBPtr () const
 
ArmISA::TLBgetITBPtr () const
 
TLBgetTlb (BaseMMU::Mode mode, bool stage2) const
 
- Protected Member Functions inherited from gem5::BaseMMU
 BaseMMU (const Params &p)
 
BaseTLBgetTlb (Mode mode) const
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
virtual void drainResume ()
 Resume execution after a successful drain. More...
 
void signalDrainDone () const
 Signal that an object is drained. More...
 

Protected Attributes

TLBitbStage2
 
TLBdtbStage2
 
TableWalkeritbWalker
 
TableWalkerdtbWalker
 
TableWalkeritbStage2Walker
 
TableWalkerdtbStage2Walker
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters. More...
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue. More...
 

Additional Inherited Members

- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system. More...
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it. More...
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it. More...
 
- Public Attributes inherited from gem5::BaseMMU
BaseTLBdtb
 
BaseTLBitb
 
- Protected Types inherited from gem5::BaseMMU
typedef BaseMMUParams Params
 

Detailed Description

Definition at line 51 of file mmu.hh.

Member Enumeration Documentation

◆ TLBType

Enumerator
I_TLBS 
D_TLBS 
ALL_TLBS 

Definition at line 78 of file mmu.hh.

Constructor & Destructor Documentation

◆ MMU()

gem5::MMU::MMU ( const ArmMMUParams &  p)

Definition at line 47 of file mmu.cc.

Member Function Documentation

◆ dflush()

template<typename OP >
void gem5::ArmISA::MMU::dflush ( const OP &  tlbi_op)
inline

◆ flush()

template<typename OP >
void gem5::ArmISA::MMU::flush ( const OP &  tlbi_op)
inline

◆ flushAll()

void gem5::ArmISA::MMU::flushAll ( )
inlineoverridevirtual

Reimplemented from gem5::BaseMMU.

Definition at line 151 of file mmu.hh.

References dtbStage2, gem5::BaseMMU::flushAll(), gem5::ArmISA::TLB::flushAll(), and itbStage2.

◆ flushStage1()

template<typename OP >
void gem5::ArmISA::MMU::flushStage1 ( const OP &  tlbi_op)
inline

◆ flushStage2()

template<typename OP >
void gem5::ArmISA::MMU::flushStage2 ( const OP &  tlbi_op)
inline

Definition at line 130 of file mmu.hh.

References dtbStage2, gem5::ArmISA::TLB::flush(), and itbStage2.

Referenced by flush(), and gem5::ArmISA::TLBIIPA::operator()().

◆ getAttr()

uint64_t gem5::ArmISA::MMU::getAttr ( ) const
inline

◆ getDTBPtr()

ArmISA::TLB* gem5::ArmISA::MMU::getDTBPtr ( ) const
inlineprotected

Definition at line 55 of file mmu.hh.

References gem5::BaseMMU::dtb.

Referenced by dflush(), getAttr(), getTlb(), init(), invalidateMiscReg(), and translateFunctional().

◆ getITBPtr()

ArmISA::TLB* gem5::ArmISA::MMU::getITBPtr ( ) const
inlineprotected

Definition at line 61 of file mmu.hh.

References gem5::BaseMMU::itb.

Referenced by getTlb(), iflush(), init(), and invalidateMiscReg().

◆ getTlb()

TLB * gem5::MMU::getTlb ( BaseMMU::Mode  mode,
bool  stage2 
) const
protected

◆ iflush()

template<typename OP >
void gem5::ArmISA::MMU::iflush ( const OP &  tlbi_op)
inline

◆ init()

void gem5::MMU::init ( )
overridevirtual

init() is called after all C++ SimObjects have been created and all ports are connected.

Initializations that are independent of unserialization but rely on a fully instantiated and connected SimObject graph should be done here.

Reimplemented from gem5::SimObject.

Definition at line 56 of file mmu.cc.

References dtbStage2, dtbStage2Walker, dtbWalker, getDTBPtr(), getITBPtr(), itbStage2, itbStage2Walker, itbWalker, gem5::ArmISA::TableWalker::setMmu(), gem5::ArmISA::TLB::setStage2Tlb(), and gem5::ArmISA::TLB::setTableWalker().

◆ invalidateMiscReg()

void gem5::MMU::invalidateMiscReg ( TLBType  type = ALL_TLBS)

◆ translateAtomic() [1/2]

Fault gem5::MMU::translateAtomic ( const RequestPtr req,
ThreadContext tc,
BaseMMU::Mode  mode,
bool  stage2 
)

◆ translateAtomic() [2/2]

Fault gem5::BaseMMU::translateAtomic

Definition at line 65 of file mmu.cc.

◆ translateFunctional() [1/3]

Fault gem5::MMU::translateFunctional ( const RequestPtr req,
ThreadContext tc,
BaseMMU::Mode  mode,
TLB::ArmTranslationType  tran_type 
)

Definition at line 95 of file mmu.cc.

References gem5::ArmISA::mode, and translateFunctional().

◆ translateFunctional() [2/3]

Fault gem5::MMU::translateFunctional ( const RequestPtr req,
ThreadContext tc,
BaseMMU::Mode  mode,
TLB::ArmTranslationType  tran_type,
bool  stage2 
)

Definition at line 102 of file mmu.cc.

References getTlb(), gem5::ArmISA::mode, and gem5::ArmISA::TLB::translateFunctional().

◆ translateFunctional() [3/3]

bool gem5::MMU::translateFunctional ( ThreadContext tc,
Addr  vaddr,
Addr paddr 
)

◆ translateTiming()

void gem5::MMU::translateTiming ( const RequestPtr req,
ThreadContext tc,
BaseMMU::Translation translation,
BaseMMU::Mode  mode,
bool  stage2 
)

Definition at line 118 of file mmu.cc.

References getTlb(), gem5::ArmISA::mode, and gem5::ArmISA::TLB::translateTiming().

Member Data Documentation

◆ dtbStage2

TLB* gem5::ArmISA::MMU::dtbStage2
protected

Definition at line 70 of file mmu.hh.

Referenced by flushAll(), flushStage2(), getTlb(), and init().

◆ dtbStage2Walker

TableWalker* gem5::ArmISA::MMU::dtbStage2Walker
protected

Definition at line 75 of file mmu.hh.

Referenced by init().

◆ dtbWalker

TableWalker* gem5::ArmISA::MMU::dtbWalker
protected

Definition at line 73 of file mmu.hh.

Referenced by init().

◆ itbStage2

TLB* gem5::ArmISA::MMU::itbStage2
protected

Definition at line 69 of file mmu.hh.

Referenced by flushAll(), flushStage2(), getTlb(), and init().

◆ itbStage2Walker

TableWalker* gem5::ArmISA::MMU::itbStage2Walker
protected

Definition at line 74 of file mmu.hh.

Referenced by init().

◆ itbWalker

TableWalker* gem5::ArmISA::MMU::itbWalker
protected

Definition at line 72 of file mmu.hh.

Referenced by init().


The documentation for this class was generated from the following files:

Generated on Wed Jul 28 2021 12:10:50 for gem5 by doxygen 1.8.17