gem5
v21.1.0.1
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MinorCPU is an in-order CPU model with four fixed pipeline stages: More...
#include <cpu.hh>
Classes | |
class | MinorCPUPort |
Provide a non-protected base class for Minor's Ports as derived classes are created by Fetch1 and Execute. More... | |
Public Member Functions | |
MinorCPU (const MinorCPUParams ¶ms) | |
~MinorCPU () | |
void | init () override |
Starting, waking and initialisation. More... | |
void | startup () override |
startup() is the final initialization call before simulation. More... | |
void | wakeup (ThreadID tid) override |
void | regStats () override |
Stats interface from SimObject (by way of BaseCPU) More... | |
Counter | totalInsts () const override |
Simple inst count interface from BaseCPU. More... | |
Counter | totalOps () const override |
void | serializeThread (CheckpointOut &cp, ThreadID tid) const override |
Serialize a single thread. More... | |
void | unserializeThread (CheckpointIn &cp, ThreadID tid) override |
Unserialize one thread. More... | |
void | serialize (CheckpointOut &cp) const override |
Serialize pipeline data. More... | |
void | unserialize (CheckpointIn &cp) override |
Reconstruct the state of this object from a checkpoint. More... | |
DrainState | drain () override |
Drain interface. More... | |
void | drainResume () override |
Resume execution after a successful drain. More... | |
void | signalDrainDone () |
Signal from Pipeline that MinorCPU should signal that a drain is complete and set its drainState. More... | |
void | memWriteback () override |
Write back dirty buffers to memory using functional writes. More... | |
void | switchOut () override |
Switching interface from BaseCPU. More... | |
void | takeOverFrom (BaseCPU *old_cpu) override |
Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be switched in. More... | |
void | activateContext (ThreadID thread_id) override |
Thread activation interface from BaseCPU. More... | |
void | suspendContext (ThreadID thread_id) override |
Notify the CPU that the indicated context is now suspended. More... | |
std::vector< ThreadID > | roundRobinPriority (ThreadID priority) |
Thread scheduling utility functions. More... | |
std::vector< ThreadID > | randomPriority () |
void | tick () |
The tick method in the MinorCPU is simply updating the cycle counters as the ticking of the pipeline stages is already handled by the Pipeline object. More... | |
void | wakeupOnEvent (unsigned int stage_id) |
Interface for stages to signal that they have become active after a callback or eventq event where the pipeline itself may have already been idled. More... | |
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int | cpuId () const |
Reads this CPU's ID. More... | |
uint32_t | socketId () const |
Reads this CPU's Socket ID. More... | |
RequestorID | dataRequestorId () const |
Reads this CPU's unique data requestor ID. More... | |
RequestorID | instRequestorId () const |
Reads this CPU's unique instruction requestor ID. More... | |
Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
Get a port on this CPU. More... | |
uint32_t | taskId () const |
Get cpu task id. More... | |
void | taskId (uint32_t id) |
Set cpu task id. More... | |
uint32_t | getPid () const |
void | setPid (uint32_t pid) |
void | workItemBegin () |
void | workItemEnd () |
Tick | instCount () |
BaseInterrupts * | getInterruptController (ThreadID tid) |
void | postInterrupt (ThreadID tid, int int_num, int index) |
void | clearInterrupt (ThreadID tid, int int_num, int index) |
void | clearInterrupts (ThreadID tid) |
bool | checkInterrupts (ThreadID tid) const |
Trace::InstTracer * | getTracer () |
Provide access to the tracer pointer. More... | |
virtual void | haltContext (ThreadID thread_num) |
Notify the CPU that the indicated context is now halted. More... | |
int | findContext (ThreadContext *tc) |
Given a Thread Context pointer return the thread num. More... | |
virtual ThreadContext * | getContext (int tn) |
Given a thread num get tho thread context for it. More... | |
unsigned | numContexts () |
Get the number of thread contexts available. More... | |
ThreadID | contextToThread (ContextID cid) |
Convert ContextID to threadID. More... | |
PARAMS (BaseCPU) | |
BaseCPU (const Params ¶ms, bool is_checker=false) | |
virtual | ~BaseCPU () |
void | regProbePoints () override |
Register probe points for this object. More... | |
void | registerThreadContexts () |
void | deschedulePowerGatingEvent () |
void | schedulePowerGatingEvent () |
void | flushTLBs () |
Flush all TLBs in the CPU. More... | |
bool | switchedOut () const |
Determine if the CPU is switched out. More... | |
virtual void | verifyMemoryMode () const |
Verify that the system is in a memory mode supported by the CPU. More... | |
unsigned int | cacheLineSize () const |
Get the cache line size of the system. More... | |
void | scheduleInstStop (ThreadID tid, Counter insts, const char *cause) |
Schedule an event that exits the simulation loops after a predefined number of instructions. More... | |
uint64_t | getCurrentInstCount (ThreadID tid) |
Get the number of instructions executed by the specified thread on this CPU. More... | |
void | traceFunctions (Addr pc) |
void | armMonitor (ThreadID tid, Addr address) |
bool | mwait (ThreadID tid, PacketPtr pkt) |
void | mwaitAtomic (ThreadID tid, ThreadContext *tc, BaseMMU *mmu) |
AddressMonitor * | getCpuAddrMonitor (ThreadID tid) |
virtual void | probeInstCommit (const StaticInstPtr &inst, Addr pc) |
Helper method to trigger PMU probes for a committed instruction. More... | |
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ClockedObject (const ClockedObjectParams &p) | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
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const Params & | params () const |
SimObject (const Params &p) | |
virtual | ~SimObject () |
virtual void | loadState (CheckpointIn &cp) |
loadState() is called on each SimObject when restoring from a checkpoint. More... | |
virtual void | initState () |
initState() is called on each SimObject when not restoring from a checkpoint. More... | |
virtual void | regProbeListeners () |
Register probe listeners for this object. More... | |
ProbeManager * | getProbeManager () |
Get the probe manager for this object. More... | |
DrainState | drain () override |
Provide a default implementation of the drain interface for objects that don't need draining. More... | |
virtual void | memInvalidate () |
Invalidate the contents of memory buffers. More... | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
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EventQueue * | eventQueue () const |
void | schedule (Event &event, Tick when) |
void | deschedule (Event &event) |
void | reschedule (Event &event, Tick when, bool always=false) |
void | schedule (Event *event, Tick when) |
void | deschedule (Event *event) |
void | reschedule (Event *event, Tick when, bool always=false) |
void | wakeupEventQueue (Tick when=(Tick) -1) |
This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More... | |
void | setCurTick (Tick newVal) |
EventManager (EventManager &em) | |
Event manger manages events in the event queue. More... | |
EventManager (EventManager *em) | |
EventManager (EventQueue *eq) | |
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Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. More... | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. More... | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
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DrainState | drainState () const |
Return the current drain state of an object. More... | |
virtual void | notifyFork () |
Notify a child process of a fork. More... | |
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Group (Group *parent, const char *name=nullptr) | |
Construct a new statistics group. More... | |
virtual | ~Group () |
virtual void | resetStats () |
Callback to reset stats. More... | |
virtual void | preDumpStats () |
Callback before stats are dumped. More... | |
void | addStat (statistics::Info *info) |
Register a stat with this group. More... | |
const std::map< std::string, Group * > & | getStatGroups () const |
Get all child groups associated with this object. More... | |
const std::vector< Info * > & | getStats () const |
Get all stats associated with this object. More... | |
void | addStatGroup (const char *name, Group *block) |
Add a stat block as a child of this block. More... | |
const Info * | resolveStat (std::string name) const |
Resolve a stat by its name within this group. More... | |
void | mergeStatGroup (Group *block) |
Merge the contents (stats & children) of a block to this block. More... | |
Group ()=delete | |
Group (const Group &)=delete | |
Group & | operator= (const Group &)=delete |
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Named (const std::string &name_) | |
virtual | ~Named ()=default |
virtual std::string | name () const |
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void | updateClockPeriod () |
Update the tick to the current tick. More... | |
Tick | clockEdge (Cycles cycles=Cycles(0)) const |
Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More... | |
Cycles | curCycle () const |
Determine the current cycle, corresponding to a tick aligned to a clock edge. More... | |
Tick | nextCycle () const |
Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More... | |
uint64_t | frequency () const |
Tick | clockPeriod () const |
double | voltage () const |
Cycles | ticksToCycles (Tick t) const |
Tick | cyclesToTicks (Cycles c) const |
Public Attributes | |
minor::MinorActivityRecorder * | activityRecorder |
Activity recording for pipeline. More... | |
std::vector< minor::MinorThread * > | threads |
These are thread state-representing objects for this CPU. More... | |
enums::ThreadPolicy | threadPolicy |
Thread Scheduling Policy (RoundRobin, Random, etc) More... | |
minor::MinorStats | stats |
Processor-specific statistics. More... | |
EventFunctionWrapper * | fetchEventWrapper |
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ThreadID | numThreads |
Number of threads we're actually simulating (<= SMT_MAX_THREADS). More... | |
System * | system |
gem5::BaseCPU::BaseCPUStats | baseStats |
Cycles | syscallRetryLatency |
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PowerState * | powerState |
Protected Member Functions | |
Port & | getDataPort () override |
Return a reference to the data port. More... | |
Port & | getInstPort () override |
Return a reference to the instruction port. More... | |
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void | updateCycleCounters (CPUState state) |
base method keeping track of cycle progression More... | |
void | enterPwrGating () |
probing::PMUUPtr | pmuProbePoint (const char *name) |
Helper method to instantiate probe points belonging to this object. More... | |
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Drainable () | |
virtual | ~Drainable () |
void | signalDrainDone () const |
Signal that an object is drained. More... | |
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Clocked (ClockDomain &clk_domain) | |
Create a clocked object and set the clock domain based on the parameters. More... | |
Clocked (Clocked &)=delete | |
Clocked & | operator= (Clocked &)=delete |
virtual | ~Clocked () |
Virtual destructor due to inheritance. More... | |
void | resetClock () const |
Reset the object's clock using the current global tick value. More... | |
virtual void | clockPeriodUpdated () |
A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More... | |
Protected Attributes | |
minor::Pipeline * | pipeline |
pipeline is a container for the clockable pipeline stage objects. More... | |
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Tick | instCnt |
Instruction count used for SPARC misc register. More... | |
int | _cpuId |
const uint32_t | _socketId |
Each cpu will have a socket ID that corresponds to its physical location in the system. More... | |
RequestorID | _instRequestorId |
instruction side request id that must be placed in all requests More... | |
RequestorID | _dataRequestorId |
data side request id that must be placed in all requests More... | |
uint32_t | _taskId |
An intrenal representation of a task identifier within gem5. More... | |
uint32_t | _pid |
The current OS process ID that is executing on this processor. More... | |
bool | _switchedOut |
Is the CPU switched out or active? More... | |
const unsigned int | _cacheLineSize |
Cache the cache line size that we get from the system. More... | |
std::vector< BaseInterrupts * > | interrupts |
std::vector< ThreadContext * > | threadContexts |
Trace::InstTracer * | tracer |
Cycles | previousCycle |
CPUState | previousState |
const Cycles | pwrGatingLatency |
const bool | powerGatingOnIdle |
EventFunctionWrapper | enterPwrGatingEvent |
probing::PMUUPtr | ppRetiredInsts |
Instruction commit probe point. More... | |
probing::PMUUPtr | ppRetiredInstsPC |
probing::PMUUPtr | ppRetiredLoads |
Retired load instructions. More... | |
probing::PMUUPtr | ppRetiredStores |
Retired store instructions. More... | |
probing::PMUUPtr | ppRetiredBranches |
Retired branches (any type) More... | |
probing::PMUUPtr | ppAllCycles |
CPU cycle counter even if any thread Context is suspended. More... | |
probing::PMUUPtr | ppActiveCycles |
CPU cycle counter, only counts if any thread contexts is active. More... | |
ProbePointArg< bool > * | ppSleeping |
ProbePoint that signals transitions of threadContexts sets. More... | |
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const SimObjectParams & | _params |
Cached copy of the object parameters. More... | |
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EventQueue * | eventq |
A pointer to this object's event queue. More... | |
Additional Inherited Members | |
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using | Params = ClockedObjectParams |
Parameters of ClockedObject. More... | |
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typedef SimObjectParams | Params |
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static int | numSimulatedCPUs () |
static Counter | numSimulatedInsts () |
static Counter | numSimulatedOps () |
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static void | serializeAll (const std::string &cpt_dir) |
Create a checkpoint by serializing all SimObjects in the system. More... | |
static SimObject * | find (const char *name) |
Find the SimObject with the given name and return a pointer to it. More... | |
static void | setSimObjectResolver (SimObjectResolver *resolver) |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More... | |
static SimObjectResolver * | getSimObjectResolver () |
There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More... | |
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static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. More... | |
static void | generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream) |
Generate a checkpoint file so that the serialization can be routed to it. More... | |
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static const uint32_t | invldPid = std::numeric_limits<uint32_t>::max() |
Invalid or unknown Pid. More... | |
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enum | CPUState { CPU_STATE_ON, CPU_STATE_SLEEP, CPU_STATE_WAKEUP } |
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static std::unique_ptr< GlobalStats > | globalStats |
Pointer to the global stat structure. More... | |
MinorCPU is an in-order CPU model with four fixed pipeline stages:
Fetch1 - fetches lines from memory Fetch2 - decomposes lines into macro-op instructions Decode - decomposes macro-ops into micro-ops Execute - executes those micro-ops
This pipeline is carried in the MinorCPU::pipeline object. The exec_context interface is not carried by MinorCPU but by minor::ExecContext objects created by minor::Execute.
gem5::MinorCPU::MinorCPU | ( | const MinorCPUParams & | params | ) |
Definition at line 50 of file cpu.cc.
References activityRecorder, fatal, fetchEventWrapper, gem5::FullSystem, gem5::SimpleThread::getTC(), gem5::ThreadContext::Halted, gem5::ArmISA::i, gem5::minor::MinorDynInst::init(), gem5::BaseCPU::numThreads, gem5::SimObject::params(), gem5::SimpleThread::setStatus(), gem5::BaseCPU::threadContexts, and threads.
gem5::MinorCPU::~MinorCPU | ( | ) |
Definition at line 87 of file cpu.cc.
References fetchEventWrapper, pipeline, and threads.
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overridevirtual |
Thread activation interface from BaseCPU.
Reimplemented from gem5::BaseCPU.
Definition at line 263 of file cpu.cc.
References gem5::BaseCPU::activateContext(), gem5::Clocked::clockEdge(), gem5::minor::Pipeline::CPUStageId, DPRINTF, fetchEventWrapper, gem5::minor::MinorStats::quiesceCycles, gem5::EventManager::schedule(), stats, threads, and wakeupOnEvent().
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overridevirtual |
Drain interface.
Implements gem5::Drainable.
Definition at line 176 of file cpu.cc.
References gem5::BaseCPU::deschedulePowerGatingEvent(), DPRINTF, gem5::Drained, gem5::Draining, and gem5::BaseCPU::switchedOut().
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overridevirtual |
Resume execution after a successful drain.
Reimplemented from gem5::Drainable.
Definition at line 207 of file cpu.cc.
References DPRINTF, fatal, gem5::System::isTimingMode(), gem5::BaseCPU::numThreads, gem5::BaseCPU::schedulePowerGatingEvent(), gem5::BaseCPU::switchedOut(), gem5::BaseCPU::system, and wakeup().
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overrideprotectedvirtual |
Return a reference to the data port.
Implements gem5::BaseCPU.
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overrideprotectedvirtual |
Return a reference to the instruction port.
Implements gem5::BaseCPU.
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overridevirtual |
Starting, waking and initialisation.
Reimplemented from gem5::BaseCPU.
Definition at line 100 of file cpu.cc.
References fatal, gem5::BaseCPU::getContext(), gem5::System::getMemoryMode(), gem5::BaseCPU::init(), gem5::ThreadContext::initMemProxies(), gem5::SimObject::params(), gem5::BaseCPU::system, and threads.
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overridevirtual |
Write back dirty buffers to memory using functional writes.
After returning, an object implementing this method should have written all its dirty data back to memory. This method is typically used to prepare a system with caches for checkpointing.
Reimplemented from gem5::SimObject.
Definition at line 237 of file cpu.cc.
References DPRINTF.
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inline |
Definition at line 182 of file cpu.hh.
References gem5::Random::gen, gem5::ArmISA::i, gem5::BaseCPU::numThreads, and gem5::random_mt.
Referenced by gem5::minor::Execute::getCommittingThread(), gem5::minor::Execute::getIssuingThread(), gem5::minor::Decode::getScheduledThread(), gem5::minor::Fetch2::getScheduledThread(), and gem5::minor::Fetch1::getScheduledThread().
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overridevirtual |
Stats interface from SimObject (by way of BaseCPU)
Reimplemented from gem5::BaseCPU.
Definition at line 121 of file cpu.cc.
References gem5::BaseCPU::regStats().
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inline |
Thread scheduling utility functions.
Definition at line 173 of file cpu.hh.
References gem5::ArmISA::i, and gem5::BaseCPU::numThreads.
Referenced by gem5::minor::Execute::getCommittingThread(), gem5::minor::Execute::getIssuingThread(), gem5::minor::Decode::getScheduledThread(), gem5::minor::Fetch2::getScheduledThread(), and gem5::minor::Fetch1::getScheduledThread().
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overridevirtual |
Serialize pipeline data.
Reimplemented from gem5::BaseCPU.
Definition at line 140 of file cpu.cc.
References gem5::BaseCPU::serialize().
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overridevirtual |
Serialize a single thread.
cp | The stream to serialize to. |
tid | ID of the current thread. |
Reimplemented from gem5::BaseCPU.
Definition at line 128 of file cpu.cc.
References threads.
void gem5::MinorCPU::signalDrainDone | ( | ) |
Signal from Pipeline that MinorCPU should signal that a drain is complete and set its drainState.
Definition at line 200 of file cpu.cc.
References DPRINTF, and gem5::Drainable::signalDrainDone().
Referenced by gem5::minor::Pipeline::evaluate().
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overridevirtual |
startup() is the final initialization call before simulation.
All state is initialized (including unserialized state, if any, such as the curTick() value), so this is the appropriate place to schedule initial event(s) for objects that need them.
Reimplemented from gem5::BaseCPU.
Definition at line 165 of file cpu.cc.
References DPRINTF, gem5::BaseCPU::numThreads, and gem5::BaseCPU::startup().
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overridevirtual |
Notify the CPU that the indicated context is now suspended.
Check if possible to enter a lower power state
Reimplemented from gem5::BaseCPU.
Definition at line 292 of file cpu.cc.
References DPRINTF, gem5::BaseCPU::suspendContext(), and threads.
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overridevirtual |
Switching interface from BaseCPU.
Reimplemented from gem5::BaseCPU.
Definition at line 243 of file cpu.cc.
References activityRecorder, DPRINTF, gem5::ActivityRecorder::reset(), gem5::BaseCPU::switchedOut(), and gem5::BaseCPU::switchOut().
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overridevirtual |
Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be switched in.
A CPU model implementing this method is expected to initialize its state from the old CPU and connect its memory (unless they are already connected) to the memories connected to the old CPU.
cpu | CPU to initialize read state from. |
Reimplemented from gem5::BaseCPU.
Definition at line 255 of file cpu.cc.
References DPRINTF, and gem5::BaseCPU::takeOverFrom().
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inline |
The tick method in the MinorCPU is simply updating the cycle counters as the ticking of the pipeline stages is already handled by the Pipeline object.
Definition at line 199 of file cpu.hh.
References gem5::BaseCPU::CPU_STATE_ON, and gem5::BaseCPU::updateCycleCounters().
Referenced by gem5::minor::Pipeline::evaluate().
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overridevirtual |
Simple inst count interface from BaseCPU.
Implements gem5::BaseCPU.
Definition at line 324 of file cpu.cc.
References gem5::ArmISA::i, and threads.
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overridevirtual |
Implements gem5::BaseCPU.
Definition at line 335 of file cpu.cc.
References gem5::ArmISA::i, and threads.
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overridevirtual |
Reconstruct the state of this object from a checkpoint.
cp | The checkpoint use. |
Reimplemented from gem5::BaseCPU.
Definition at line 147 of file cpu.cc.
References gem5::BaseCPU::unserialize().
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overridevirtual |
Unserialize one thread.
cp | The checkpoint use. |
tid | ID of the current thread. |
Reimplemented from gem5::BaseCPU.
Definition at line 134 of file cpu.cc.
References threads.
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overridevirtual |
Implements gem5::BaseCPU.
Definition at line 154 of file cpu.cc.
References DPRINTF, gem5::BaseCPU::numThreads, gem5::ArmISA::status, gem5::ThreadContext::Suspended, and threads.
Referenced by drainResume(), gem5::minor::LSQ::recvTimingSnoopReq(), and gem5::minor::LSQ::threadSnoop().
void gem5::MinorCPU::wakeupOnEvent | ( | unsigned int | stage_id | ) |
Interface for stages to signal that they have become active after a callback or eventq event where the pipeline itself may have already been idled.
The stage argument should be from the enumeration Pipeline::StageId
Definition at line 302 of file cpu.cc.
References gem5::ActivityRecorder::activateStage(), activityRecorder, and DPRINTF.
Referenced by activateContext(), gem5::minor::Execute::drain(), gem5::minor::Execute::drainResume(), gem5::minor::Execute::evaluate(), gem5::minor::Fetch1::evaluate(), gem5::minor::Fetch1::recvTimingResp(), gem5::minor::LSQ::recvTimingResp(), gem5::minor::Fetch1::tryToSendToTransfers(), and gem5::minor::Fetch1::wakeupFetch().
minor::MinorActivityRecorder* gem5::MinorCPU::activityRecorder |
Activity recording for pipeline.
This belongs to Pipeline but stages will access it through the CPU as the MinorCPU object actually mediates idling behaviour
Definition at line 96 of file cpu.hh.
Referenced by gem5::minor::Decode::evaluate(), gem5::minor::Fetch2::evaluate(), gem5::minor::Execute::evaluate(), gem5::minor::Fetch1::evaluate(), gem5::minor::Execute::issue(), MinorCPU(), switchOut(), and wakeupOnEvent().
EventFunctionWrapper* gem5::MinorCPU::fetchEventWrapper |
Definition at line 206 of file cpu.hh.
Referenced by activateContext(), MinorCPU(), and ~MinorCPU().
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protected |
pipeline is a container for the clockable pipeline stage objects.
Elements of pipeline call TheISA to implement the model.
Definition at line 90 of file cpu.hh.
Referenced by ~MinorCPU().
minor::MinorStats gem5::MinorCPU::stats |
Processor-specific statistics.
Definition at line 140 of file cpu.hh.
Referenced by activateContext(), gem5::minor::Execute::commit(), gem5::minor::Execute::commitInst(), and gem5::minor::Execute::doInstCommitAccounting().
enums::ThreadPolicy gem5::MinorCPU::threadPolicy |
Thread Scheduling Policy (RoundRobin, Random, etc)
Definition at line 120 of file cpu.hh.
Referenced by gem5::minor::Execute::getCommittingThread(), gem5::minor::Execute::getIssuingThread(), gem5::minor::Decode::getScheduledThread(), gem5::minor::Fetch2::getScheduledThread(), and gem5::minor::Fetch1::getScheduledThread().
std::vector<minor::MinorThread *> gem5::MinorCPU::threads |
These are thread state-representing objects for this CPU.
If you need a ThreadContext for any reason, use threads[threadId]->getTC()
Definition at line 101 of file cpu.hh.
Referenced by activateContext(), gem5::minor::Execute::commitInst(), gem5::minor::Execute::doInstCommitAccounting(), gem5::minor::Fetch2::evaluate(), gem5::minor::Execute::Execute(), gem5::minor::Execute::executeMemRefInst(), gem5::minor::Fetch1::Fetch1(), gem5::minor::Fetch1::fetchLine(), gem5::minor::Execute::handleMemResponse(), init(), gem5::minor::Execute::issue(), MinorCPU(), gem5::minor::LSQ::pushRequest(), serializeThread(), suspendContext(), totalInsts(), totalOps(), gem5::minor::Execute::tryPCEvents(), gem5::minor::LSQ::tryToSendToTransfers(), unserializeThread(), wakeup(), and ~MinorCPU().