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43 #include "debug/Decode.hh"
54 const MinorCPUParams ¶ms,
62 nextStageReserve(next_stage_input_buffer),
63 outputWidth(params.executeInputWidth),
64 processMoreThanOneInput(params.decodeCycleInput),
65 decodeInfo(params.numThreads),
71 if (params.decodeInputBufferSize < 1) {
72 fatal(
"%s: decodeInputBufferSize must be >= 1 (%d)\n",
name,
73 params.decodeInputBufferSize);
77 for (
ThreadID tid = 0; tid < params.numThreads; tid++) {
81 params.decodeInputBufferSize));
131 if (!
inp.outputWire->isBubble())
147 unsigned int output_index = 0;
157 if (inst->isBubble()) {
167 if (inst->isFault()) {
169 inst->fault->name());
197 output_inst->predictedTaken = inst->predictedTaken;
198 output_inst->predictedTarget = inst->predictedTarget;
202 " %d output_index: %d lastMicroop: %s microopPC:"
213 parent_static_inst = static_inst;
225 " %d output_index: %d\n",
226 *output_inst, decode_info.
inputIndex, output_index);
228 parent_static_inst = static_inst;
236 output_inst->id.execSeqNum = decode_info.
execSeqNum;
239 dynInstAddTracing(output_inst, parent_static_inst,
cpu);
248 insts_out.
insts[output_index] = output_inst;
296 if (!
inp.outputWire->isBubble())
307 case enums::SingleThreaded:
308 priority_list.push_back(0);
310 case enums::RoundRobin:
317 panic(
"Unknown fetch policy");
320 for (
auto tid : priority_list) {
338 return (*
inp.outputWire).isBubble();
344 std::ostringstream
data;
349 (*
out.inputWire).reportData(
data);
Tick curTick()
The universal simulation clock.
#define fatal(...)
This implements a cprintf based fatal() function.
std::vector< ThreadID > randomPriority()
constexpr decltype(nullptr) NoFault
std::vector< InputBuffer< ForwardInstData > > & nextStageReserve
Interface to reserve space in the next stage.
bool isBubble() const
BubbleIF interface.
MinorDynInstPtr insts[MAX_FORWARD_INSTS]
Array of carried insts, ref counted.
ThreadID threadId
Thread associated with these instructions.
unsigned int outputWidth
Width of output of this stage/input of next in instructions.
const StaticInstPtr staticInst
const std::string to_string(sc_enc enc)
void setFetchSeq(InstSeqNum seq)
bool isDrained()
Is this stage drained? For Decoed, draining is initiated by Execute halting Fetch1 causing Fetch2 to ...
MinorCPU is an in-order CPU model with four fixed pipeline stages:
Forward flowing data between Fetch2,Decode,Execute carrying a packet of instructions of a width appro...
TheISA::PCState microopPC
virtual StaticInstPtr fetchMicroop(MicroPC upc) const
Return the microop that goes with a particular micropc.
Interface for things with names.
void popInput(ThreadID tid)
Pop an element off the input buffer, if there are any.
ThreadID numThreads
Number of threads we're actually simulating (<= SMT_MAX_THREADS).
std::vector< DecodeThreadInfo > decodeInfo
bool inMacroop
True when we're in the process of decomposing a micro-op and microopPC will be valid.
virtual std::string name() const
unsigned int inputIndex
Index into the inputBuffer's head marking the start of unhandled instructions.
unsigned int width() const
Number of instructions carried by this object.
const ThreadID InvalidThreadID
virtual InstRecord * getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr staticInst, TheISA::PCState pc, const StaticInstPtr macroStaticInst=NULL)=0
virtual ThreadContext * getContext(int tn)
Given a thread num get tho thread context for it.
void evaluate()
Pass on input/buffer data to the output if you can.
GEM5_DEPRECATED_NAMESPACE(GuestABI, guest_abi)
const std::string & name()
bool isLastMicroop() const
void minorTrace(const char *fmt, Args ...args)
DPRINTFN for MinorTrace reporting.
void activity()
Records that there is activity this cycle.
bool processMoreThanOneInput
If true, more than one input word can be processed each cycle if there is room in the output to conta...
Trace::InstTracer * getTracer()
Provide access to the tracer pointer.
MinorCPU & cpu
Pointer back to the containing CPU.
void activateStage(const int idx)
Marks a stage as active.
void resize(unsigned int width)
Resize a bubble/empty ForwardInstData and fill with bubbles.
Dynamic instruction for Minor.
Decode(const std::string &name, MinorCPU &cpu_, const MinorCPUParams ¶ms, Latch< ForwardInstData >::Output inp_, Latch< ForwardInstData >::Input out_, std::vector< InputBuffer< ForwardInstData >> &next_stage_input_buffer)
InstSeqNum execSeqNum
Source of execSeqNums to number instructions.
TheISA::PCState pc
The fetch address of this instruction.
ThreadID getScheduledThread()
Use the current threading policy to determine the next thread to decode from.
Latch< ForwardInstData >::Input out
Output port carrying micro-op decomposed instructions to Execute.
InstSeqNum execSeqNum
'Execute' sequence number.
enums::ThreadPolicy threadPolicy
Thread Scheduling Policy (RoundRobin, Random, etc)
minor::MinorActivityRecorder * activityRecorder
Activity recording for pipeline.
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Trace::InstRecord * traceData
Trace information for this instruction's execution.
virtual void advancePC(TheISA::PCState &pc_state) const =0
Data members after this line are cycle-to-cycle state.
std::vector< ThreadID > roundRobinPriority(ThreadID priority)
Thread scheduling utility functions.
int16_t ThreadID
Thread index/ID type.
std::vector< InputBuffer< ForwardInstData > > inputBuffer
ThreadID threadId
The thread to which this line/instruction belongs.
Latch< ForwardInstData >::Output inp
Input port carrying macro instructions from Fetch2.
#define panic(...)
This implements a cprintf based panic() function.
const ForwardInstData * getInput(ThreadID tid)
Get a piece of data to work on, or 0 if there is no data.
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