inst_pb_trace.cc

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 * to a hardware implementation of the functionality of the software
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#include "cpu/inst_pb_trace.hh"
 
#include "base/callback.hh"
#include "base/output.hh"
#include "config/the_isa.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
#include "debug/ExecEnable.hh"
#include "params/InstPBTrace.hh"
#include "proto/inst.pb.h"
#include "sim/core.hh"
#include "sim/cur_tick.hh"
 
namespace gem5
{
 
namespace Trace {
 
ProtoOutputStream *InstPBTrace::traceStream;
 
void
InstPBTraceRecord::dump()
{
    // We're trying to build an instruction trace so we just want macro-ops and
    // instructions that aren't macro-oped
    if ((macroStaticInst && staticInst->isFirstMicroop()) ||
            !staticInst->isMicroop()) {
        tracer.traceInst(thread, staticInst, pc);
    }
 
    // If this instruction accessed memory lets record it
    if (getMemValid())
        tracer.traceMem(staticInst, getAddr(), getSize(), getFlags());
}
 
InstPBTrace::InstPBTrace(const InstPBTraceParams &p)
    : InstTracer(p), buf(nullptr), bufSize(0), curMsg(nullptr)
{
    // Create our output file
    createTraceFile(p.file_name);
}
 
void
InstPBTrace::createTraceFile(std::string filename)
{
    // Since there is only one output file for all tracers check if it exists
    if (traceStream)
        return;
 
    traceStream = new ProtoOutputStream(simout.resolve(filename));
 
    // Output the header
    ProtoMessage::InstHeader header_msg;
    header_msg.set_obj_id("gem5 generated instruction trace");
    header_msg.set_ver(0);
    header_msg.set_tick_freq(sim_clock::Frequency);
    header_msg.set_has_mem(true);
    traceStream->write(header_msg);
 
    // get a callback when we exit so we can close the file
    registerExitCallback([this]() { closeStreams(); });
}
 
void
InstPBTrace::closeStreams()
{
    if (curMsg) {
        traceStream->write(*curMsg);
        delete curMsg;
        curMsg = NULL;
    }
 
    if (!traceStream)
        return;
 
    delete traceStream;
    traceStream = NULL;
}
 
InstPBTrace::~InstPBTrace()
{
    closeStreams();
}
 
InstPBTraceRecord*
InstPBTrace::getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr si,
                           TheISA::PCState pc, const StaticInstPtr mi)
{
    // Only record the trace if Exec debugging is enabled
    if (!debug::ExecEnable)
        return NULL;
 
    return new InstPBTraceRecord(*this, when, tc, si, pc, mi);
 
}
 
void
InstPBTrace::traceInst(ThreadContext *tc, StaticInstPtr si, TheISA::PCState pc)
{
    if (curMsg) {
        traceStream->write(*curMsg);
        delete curMsg;
        curMsg = NULL;
    }
 
    size_t instSize = si->asBytes(buf.get(), bufSize);
    if (instSize > bufSize) {
        bufSize = instSize;
        buf.reset(new uint8_t[bufSize]);
        instSize = si->asBytes(buf.get(), bufSize);
    }
 
    // Create a new instruction message and fill out the fields
    curMsg = new ProtoMessage::Inst;
    curMsg->set_pc(pc.pc());
    if (instSize == sizeof(uint32_t)) {
        curMsg->set_inst(letoh(*reinterpret_cast<uint32_t *>(buf.get())));
    } else if (instSize) {
        curMsg->set_inst_bytes(
            std::string(reinterpret_cast<const char *>(buf.get()), bufSize));
    }
    curMsg->set_cpuid(tc->cpuId());
    curMsg->set_tick(curTick());
    curMsg->set_type(static_cast<ProtoMessage::Inst_InstType>(si->opClass()));
}
 
void
InstPBTrace::traceMem(StaticInstPtr si, Addr a, Addr s, unsigned f)
{
    panic_if(!curMsg, "Memory access w/o msg?!");
 
    // We do a poor job identifying macro-ops that are load/stores
    curMsg->set_type(static_cast<ProtoMessage::Inst_InstType>(si->opClass()));
 
    ProtoMessage::Inst::MemAccess *mem_msg = curMsg->add_mem_access();
    mem_msg->set_addr(a);
    mem_msg->set_size(s);
    mem_msg->set_mem_flags(f);
 
}
 
} // namespace Trace
} // namespace gem5