fetch_stage.cc

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/*
 * Copyright (c) 2014-2015 Advanced Micro Devices, Inc.
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 *
 * For use for simulation and test purposes only
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#include "gpu-compute/fetch_stage.hh"
 
#include "gpu-compute/compute_unit.hh"
#include "gpu-compute/wavefront.hh"
 
namespace gem5
{
 
FetchStage::FetchStage(const ComputeUnitParams &p, ComputeUnit &cu)
    : numVectorALUs(p.num_SIMDs), computeUnit(cu),
      _name(cu.name() + ".FetchStage"), stats(&cu)
{
    for (int j = 0; j < numVectorALUs; ++j) {
        FetchUnit newFetchUnit(p, cu);
        _fetchUnit.push_back(newFetchUnit);
    }
}
 
FetchStage::~FetchStage()
{
    _fetchUnit.clear();
}
 
void
FetchStage::init()
{
    for (int j = 0; j < numVectorALUs; ++j) {
        _fetchUnit[j].bindWaveList(&computeUnit.wfList[j]);
        _fetchUnit[j].init();
    }
}
 
void
FetchStage::exec()
{
    for (int j = 0; j < numVectorALUs; ++j) {
        _fetchUnit[j].exec();
    }
}
 
void
FetchStage::processFetchReturn(PacketPtr pkt)
{
    ComputeUnit::SQCPort::SenderState *sender_state =
        safe_cast<ComputeUnit::SQCPort::SenderState*>(pkt->senderState);
 
    Wavefront *wavefront = sender_state->wavefront;
 
    const unsigned num_instructions = pkt->req->getSize() /
        sizeof(TheGpuISA::RawMachInst);
 
    stats.instFetchInstReturned.sample(num_instructions);
    uint32_t simdId = wavefront->simdId;
    _fetchUnit[simdId].processFetchReturn(pkt);
}
 
void
FetchStage::fetch(PacketPtr pkt, Wavefront *wavefront)
{
    _fetchUnit[wavefront->simdId].fetch(pkt, wavefront);
}
 
FetchStage::FetchStageStats::FetchStageStats(statistics::Group *parent)
    : statistics::Group(parent, "FetchStage"),
      ADD_STAT(instFetchInstReturned, "For each instruction fetch request "
               "received record how many instructions you got from it")
{
        instFetchInstReturned.init(1, 32, 1);
}
 
} // namespace gem5