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platform.hh
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28 
34 #ifndef __DEV_PLATFORM_HH__
35 #define __DEV_PLATFORM_HH__
36 
37 #include <bitset>
38 #include <set>
39 
40 #include "params/Platform.hh"
41 #include "sim/sim_object.hh"
42 
43 namespace gem5
44 {
45 
46 class Terminal;
47 class Uart;
48 class System;
49 
50 class Platform : public SimObject
51 {
52  public:
53  System *system;
54 
55  typedef PlatformParams Params;
56  Platform(const Params &p);
57  virtual ~Platform() = default;
58 
62  virtual void postConsoleInt() = 0;
63 
67  virtual void clearConsoleInt() = 0;
68 
69 
73  virtual void postPciInt(int line);
74 
78  virtual void clearPciInt(int line);
79 };
80 
81 } // namespace gem5
82 
83 #endif // __DEV_PLATFORM_HH__
gem5::scmi::Platform
Definition: scmi_platform.hh:265
gem5::scmi::Platform::~Platform
~Platform()
Definition: scmi_platform.cc:222
gem5::Platform::postPciInt
virtual void postPciInt(int line)
Cause the chipset to post a cpi interrupt to the CPU.
Definition: platform.cc:39
gem5::Platform::postConsoleInt
virtual void postConsoleInt()=0
Cause the cpu to post a serial interrupt to the CPU.
gem5::Platform::system
System * system
Definition: platform.hh:53
gem5::System
Definition: system.hh:75
sim_object.hh
gem5::Platform::clearPciInt
virtual void clearPciInt(int line)
Clear a posted PCI->CPU interrupt.
Definition: platform.cc:45
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::scmi::Platform::Platform
Platform(const Params &p)
Definition: platform.cc:36
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::Platform::Params
PlatformParams Params
Definition: platform.hh:55
gem5::Platform::clearConsoleInt
virtual void clearConsoleInt()=0
Clear a posted CPU interrupt.
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
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