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trap.cc
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28 
29 #include "arch/sparc/insts/trap.hh"
30 
31 namespace gem5
32 {
33 
34 namespace SparcISA
35 {
36 
37 std::string
38 Trap::generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const
39 {
40  std::stringstream response;
41 
42  printMnemonic(response, mnemonic);
43  ccprintf(response, " ");
44  printReg(response, srcRegIdx(0));
45  ccprintf(response, ", 0x%x", trapNum);
46  ccprintf(response, ", or ");
47  printReg(response, srcRegIdx(1));
48  return response.str();
49 }
50 
51 } // namespace SparcISA
52 } // namespace gem5
gem5::loader::SymbolTable
Definition: symtab.hh:65
gem5::ccprintf
void ccprintf(cp::Print &print)
Definition: cprintf.hh:130
gem5::StaticInst::srcRegIdx
const RegId & srcRegIdx(int i) const
Return logical index (architectural reg num) of i'th source reg.
Definition: static_inst.hh:246
gem5::SparcISA::Trap::trapNum
int trapNum
Definition: trap.hh:62
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
trap.hh
gem5::SparcISA::SparcStaticInst::printReg
static void printReg(std::ostream &os, RegId reg)
Definition: static_inst.cc:111
gem5::MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:243
gem5::SparcISA::Trap::generateDisassembly
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: trap.cc:38
gem5::SparcISA::SparcStaticInst::printMnemonic
static void printMnemonic(std::ostream &os, const char *mnemonic)
Definition: static_inst.cc:64
gem5::StaticInst::mnemonic
const char * mnemonic
Base mnemonic (e.g., "add").
Definition: static_inst.hh:280
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
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