#include "arch/x86/kvm/x86_cpu.hh"
#include <linux/kvm.h>
#include <algorithm>
#include <cerrno>
#include <memory>
#include "arch/x86/cpuid.hh"
#include "arch/x86/faults.hh"
#include "arch/x86/interrupts.hh"
#include "arch/x86/regs/int.hh"
#include "arch/x86/regs/msr.hh"
#include "arch/x86/utility.hh"
#include "base/compiler.hh"
#include "cpu/kvm/base.hh"
#include "debug/Drain.hh"
#include "debug/Kvm.hh"
#include "debug/KvmContext.hh"
#include "debug/KvmIO.hh"
#include "debug/KvmInt.hh"

Classes
struct	gem5::FXSave

Namespaces
	gem5
	Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223.

Macros
#define	MSR_TSC 0x10

#define	IO_PCI_CONF_ADDR 0xCF8

#define	IO_PCI_CONF_DATA_BASE 0xCFC

#define	SEG_SYS_TYPE_TSS_AVAILABLE 9

#define	SEG_SYS_TYPE_TSS_BUSY 11

#define	SEG_CS_TYPE_ACCESSED 9

#define	SEG_CS_TYPE_READ_ACCESSED 11

#define	SEG_TYPE_BIT_ACCESSED 1

#define	FOREACH_IREG()

#define	FOREACH_SREG()

#define	FOREACH_DREG()

#define	FOREACH_SEGMENT()

#define	FOREACH_DTABLE()

#define	APPLY_IREG(kreg, mreg) inform("\t" # kreg ": 0x%llx\n", regs.kreg)

#define	APPLY_SREG(kreg, mreg) inform("\t" # kreg ": 0x%llx\n", sregs.kreg);

#define	APPLY_SEGMENT(kreg, idx) dumpKvm(# kreg, sregs.kreg);

#define	APPLY_DTABLE(kreg, idx) dumpKvm(# kreg, sregs.kreg);

#define	APPLY_IREG(kreg, mreg) regs.kreg = tc->readIntReg(mreg)

#define	APPLY_SREG(kreg, mreg) sregs.kreg = tc->readMiscRegNoEffect(mreg)

#define	APPLY_SEGMENT(kreg, idx) setKvmSegmentReg(tc, sregs.kreg, idx)

#define	APPLY_DTABLE(kreg, idx) setKvmDTableReg(tc, sregs.kreg, idx)

#define	APPLY_SEGMENT(kreg, idx) checkSeg(# kreg, idx + MISCREG_SEG_SEL_BASE, sregs.kreg, sregs)

#define	APPLY_IREG(kreg, mreg) tc->setIntReg(mreg, regs.kreg)

#define	APPLY_SREG(kreg, mreg) tc->setMiscRegNoEffect(mreg, sregs.kreg)

#define	APPLY_SEGMENT(kreg, idx) setContextSegment(tc, sregs.kreg, idx)

#define	APPLY_DTABLE(kreg, idx) setContextSegment(tc, sregs.kreg, idx)

Functions
template<typename Struct , typename Entry >
static auto	gem5::newVarStruct (size_t entries)

static void	gem5::dumpKvm (const struct kvm_regs &regs)

static void	gem5::dumpKvm (const char *reg_name, const struct kvm_segment &seg)

static void	gem5::dumpKvm (const char *reg_name, const struct kvm_dtable &dtable)

static void	gem5::dumpKvm (const struct kvm_sregs &sregs)

static void	gem5::dumpFpuSpec (const struct FXSave &xs)

static void	gem5::dumpFpuSpec (const struct kvm_fpu &fpu)

template<typename T >
static void	gem5::dumpFpuCommon (const T &fpu)

static void	gem5::dumpKvm (const struct kvm_fpu &fpu)

static void	gem5::dumpKvm (const struct kvm_xsave &xsave)

static void	gem5::dumpKvm (const struct kvm_msrs &msrs)

static void	gem5::dumpKvm (const struct kvm_xcrs &regs)

static void	gem5::dumpKvm (const struct kvm_vcpu_events &events)

static bool	gem5::isCanonicalAddress (uint64_t addr)

static void	gem5::checkSeg (const char *name, const int idx, const struct kvm_segment &seg, struct kvm_sregs sregs)

static void	gem5::setKvmSegmentReg (ThreadContext *tc, struct kvm_segment &kvm_seg, const int index)

static void	gem5::setKvmDTableReg (ThreadContext *tc, struct kvm_dtable &kvm_dtable, const int index)

static void	gem5::forceSegAccessed (struct kvm_segment &seg)

template<typename T >
static void	gem5::updateKvmStateFPUCommon (ThreadContext *tc, T &fpu)

void	gem5::setContextSegment (ThreadContext *tc, const struct kvm_segment &kvm_seg, const int index)

void	gem5::setContextSegment (ThreadContext *tc, const struct kvm_dtable &kvm_dtable, const int index)

template<typename T >
static void	gem5::updateThreadContextFPUCommon (ThreadContext *tc, const T &fpu)

static struct kvm_cpuid_entry2	gem5::makeKvmCpuid (uint32_t function, uint32_t index, CpuidResult &result)

Macro Definition Documentation

◆ APPLY_DTABLE [1/3]

#define APPLY_DTABLE	(	kreg,
		idx
	)	dumpKvm(# kreg, sregs.kreg);

◆ APPLY_DTABLE [2/3]

#define APPLY_DTABLE	(	kreg,
		idx
	)	setKvmDTableReg(tc, sregs.kreg, idx)

◆ APPLY_DTABLE [3/3]

#define APPLY_DTABLE	(	kreg,
		idx
	)	setContextSegment(tc, sregs.kreg, idx)

◆ APPLY_IREG [1/3]

#define APPLY_IREG	(	kreg,
		mreg
	)	inform("\t" # kreg ": 0x%llx\n", regs.kreg)

◆ APPLY_IREG [2/3]

#define APPLY_IREG	(	kreg,
		mreg
	)	regs.kreg = tc->readIntReg(mreg)

◆ APPLY_IREG [3/3]

#define APPLY_IREG	(	kreg,
		mreg
	)	tc->setIntReg(mreg, regs.kreg)

◆ APPLY_SEGMENT [1/4]

#define APPLY_SEGMENT	(	kreg,
		idx
	)	dumpKvm(# kreg, sregs.kreg);

◆ APPLY_SEGMENT [2/4]

#define APPLY_SEGMENT	(	kreg,
		idx
	)	setKvmSegmentReg(tc, sregs.kreg, idx)

◆ APPLY_SEGMENT [3/4]

#define APPLY_SEGMENT	(	kreg,
		idx
	)	checkSeg(# kreg, idx + MISCREG_SEG_SEL_BASE, sregs.kreg, sregs)

◆ APPLY_SEGMENT [4/4]

#define APPLY_SEGMENT	(	kreg,
		idx
	)	setContextSegment(tc, sregs.kreg, idx)

◆ APPLY_SREG [1/3]

#define APPLY_SREG	(	kreg,
		mreg
	)	inform("\t" # kreg ": 0x%llx\n", sregs.kreg);

◆ APPLY_SREG [2/3]

#define APPLY_SREG	(	kreg,
		mreg
	)	sregs.kreg = tc->readMiscRegNoEffect(mreg)

◆ APPLY_SREG [3/3]

#define APPLY_SREG	(	kreg,
		mreg
	)	tc->setMiscRegNoEffect(mreg, sregs.kreg)

◆ FOREACH_DREG

#define FOREACH_DREG ( )

Value:

    do {                                        \
        APPLY_DREG(db[0], MISCREG_DR0);         \
        APPLY_DREG(db[1], MISCREG_DR1);         \
        APPLY_DREG(db[2], MISCREG_DR2);         \
        APPLY_DREG(db[3], MISCREG_DR3);         \
        APPLY_DREG(dr6, MISCREG_DR6);           \
        APPLY_DREG(dr7, MISCREG_DR7);           \
    } while (0)

Definition at line 142 of file x86_cpu.cc.

◆ FOREACH_DTABLE

#define FOREACH_DTABLE ( )

Value:

    do {                                                        \
        APPLY_DTABLE(gdt, MISCREG_TSG - MISCREG_SEG_SEL_BASE);  \
        APPLY_DTABLE(idt, MISCREG_IDTR - MISCREG_SEG_SEL_BASE); \
    } while (0)

Definition at line 164 of file x86_cpu.cc.

◆ FOREACH_IREG

#define FOREACH_IREG ( )

Value:

    do {                                        \
        APPLY_IREG(rax, INTREG_RAX);            \
        APPLY_IREG(rbx, INTREG_RBX);            \
        APPLY_IREG(rcx, INTREG_RCX);            \
        APPLY_IREG(rdx, INTREG_RDX);            \
        APPLY_IREG(rsi, INTREG_RSI);            \
        APPLY_IREG(rdi, INTREG_RDI);            \
        APPLY_IREG(rsp, INTREG_RSP);            \
        APPLY_IREG(rbp, INTREG_RBP);            \
        APPLY_IREG(r8, INTREG_R8);              \
        APPLY_IREG(r9, INTREG_R9);              \
        APPLY_IREG(r10, INTREG_R10);            \
        APPLY_IREG(r11, INTREG_R11);            \
        APPLY_IREG(r12, INTREG_R12);            \
        APPLY_IREG(r13, INTREG_R13);            \
        APPLY_IREG(r14, INTREG_R14);            \
        APPLY_IREG(r15, INTREG_R15);            \
    } while (0)

Definition at line 111 of file x86_cpu.cc.

◆ FOREACH_SEGMENT

#define FOREACH_SEGMENT ( )

Value:

    do {                                                        \
        APPLY_SEGMENT(cs, MISCREG_CS - MISCREG_SEG_SEL_BASE);   \
        APPLY_SEGMENT(ds, MISCREG_DS - MISCREG_SEG_SEL_BASE);   \
        APPLY_SEGMENT(es, MISCREG_ES - MISCREG_SEG_SEL_BASE);   \
        APPLY_SEGMENT(fs, MISCREG_FS - MISCREG_SEG_SEL_BASE);   \
        APPLY_SEGMENT(gs, MISCREG_GS - MISCREG_SEG_SEL_BASE);   \
        APPLY_SEGMENT(ss, MISCREG_SS - MISCREG_SEG_SEL_BASE);   \
        APPLY_SEGMENT(tr, MISCREG_TR - MISCREG_SEG_SEL_BASE);   \
        APPLY_SEGMENT(ldt, MISCREG_TSL - MISCREG_SEG_SEL_BASE); \
    } while (0)

Definition at line 152 of file x86_cpu.cc.

◆ FOREACH_SREG

#define FOREACH_SREG ( )

Value:

    do {                                                \
        APPLY_SREG(cr0, MISCREG_CR0);                   \
        APPLY_SREG(cr2, MISCREG_CR2);                   \
        APPLY_SREG(cr3, MISCREG_CR3);                   \
        APPLY_SREG(cr4, MISCREG_CR4);                   \
        APPLY_SREG(cr8, MISCREG_CR8);                   \
        APPLY_SREG(efer, MISCREG_EFER);                 \
        APPLY_SREG(apic_base, MISCREG_APIC_BASE);       \
    } while (0)

Definition at line 131 of file x86_cpu.cc.

◆ IO_PCI_CONF_ADDR

#define IO_PCI_CONF_ADDR 0xCF8

Definition at line 58 of file x86_cpu.cc.

◆ IO_PCI_CONF_DATA_BASE

#define IO_PCI_CONF_DATA_BASE 0xCFC

Definition at line 59 of file x86_cpu.cc.

◆ MSR_TSC

#define MSR_TSC 0x10

Definition at line 56 of file x86_cpu.cc.

◆ SEG_CS_TYPE_ACCESSED

#define SEG_CS_TYPE_ACCESSED 9

Definition at line 67 of file x86_cpu.cc.

◆ SEG_CS_TYPE_READ_ACCESSED

#define SEG_CS_TYPE_READ_ACCESSED 11

Definition at line 69 of file x86_cpu.cc.

◆ SEG_SYS_TYPE_TSS_AVAILABLE

#define SEG_SYS_TYPE_TSS_AVAILABLE 9

Definition at line 62 of file x86_cpu.cc.

◆ SEG_SYS_TYPE_TSS_BUSY

#define SEG_SYS_TYPE_TSS_BUSY 11

Definition at line 64 of file x86_cpu.cc.

◆ SEG_TYPE_BIT_ACCESSED

#define SEG_TYPE_BIT_ACCESSED 1

Definition at line 73 of file x86_cpu.cc.

Classes

Namespaces

Macros

Functions

Macro Definition Documentation

◆ APPLY_DTABLE [1/3]

◆ APPLY_DTABLE [2/3]

◆ APPLY_DTABLE [3/3]

◆ APPLY_IREG [1/3]

◆ APPLY_IREG [2/3]

◆ APPLY_IREG [3/3]

◆ APPLY_SEGMENT [1/4]

◆ APPLY_SEGMENT [2/4]

◆ APPLY_SEGMENT [3/4]

◆ APPLY_SEGMENT [4/4]

◆ APPLY_SREG [1/3]

◆ APPLY_SREG [2/3]

◆ APPLY_SREG [3/3]

◆ FOREACH_DREG

◆ FOREACH_DTABLE

◆ FOREACH_IREG

◆ FOREACH_SEGMENT

◆ FOREACH_SREG

◆ IO_PCI_CONF_ADDR

◆ IO_PCI_CONF_DATA_BASE

◆ MSR_TSC

◆ SEG_CS_TYPE_ACCESSED

◆ SEG_CS_TYPE_READ_ACCESSED

◆ SEG_SYS_TYPE_TSS_AVAILABLE

◆ SEG_SYS_TYPE_TSS_BUSY

◆ SEG_TYPE_BIT_ACCESSED