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46 #include "debug/Decoder.hh"
59 decoderFlavor(dynamic_cast<
ISA *>(params.isa)->decoderFlavor())
65 ->getCurSveVecLenInBitsAtReset() >> 7) - 1;
103 uint16_t highBits =
word & 0xF800;
104 if (highBits == 0xE800 || highBits == 0xF000 ||
105 highBits == 0xF800) {
117 "First half of 32 bit Thumb.\n");
118 emi.instBits = (uint32_t)
word << 16;
137 "IT detected, cond = %#x, mask = %#x\n",
159 offset = (fetchPC >=
pc.instAddr()) ? 0 :
pc.instAddr() - fetchPC;
160 emi.thumb =
pc.thumb();
161 emi.aarch64 =
pc.aarch64();
166 const Addr alignment(
pc.thumb() ? 0x1 : 0x3);
167 emi.decoderFault =
static_cast<uint8_t
>(
182 const int inst_size((!
emi.thumb ||
emi.bigThumb) ? 4 : 2);
185 pc.npc(
pc.pc() + inst_size);
188 this_emi.itstate =
pc.itstate();
189 this_emi.illegalExecution =
pc.illegalExec() ? 1 : 0;
190 this_emi.debugStep =
pc.debugStep() ? 1 : 0;
197 return decode(this_emi,
pc.instAddr());
Bitfield< 39, 37 > fpscrLen
Bitfield< 41, 40 > fpscrStride
@ UNALIGNED
Unaligned instruction fault.
static GenericISA::BasicDecodeCache< Decoder, ExtMachInst > defaultCache
A cache of decoded instruction objects.
void moreBytes(const PCStateBase &pc, Addr fetchPC) override
Feed data to the decoder.
void reset() override
Reset the decoders internal state.
const Params & params() const
int sveLen
SVE vector length, encoded in the same format as the ZCR_EL<x>.LEN bitfields.
void consumeBytes(int numBytes)
Consume bytes by moving the offset into the data word and sanity check the results.
constexpr T bits(T val, unsigned first, unsigned last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
void process()
Pre-decode an instruction from the current state of the decoder.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Decoder(const ArmDecoderParams ¶ms)
StaticInstPtr decode(ExtMachInst mach_inst, Addr addr)
Decode a pre-decoded machine instruction.
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
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