isa.cc

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#include "arch/power/isa.hh"
 
#include "arch/power/regs/float.hh"
#include "arch/power/regs/int.hh"
#include "arch/power/regs/misc.hh"
#include "cpu/thread_context.hh"
#include "debug/FloatRegs.hh"
#include "debug/IntRegs.hh"
#include "debug/MiscRegs.hh"
#include "params/PowerISA.hh"
 
namespace gem5
{
 
namespace PowerISA
{
 
ISA::ISA(const Params &p) : BaseISA(p)
{
    _regClasses.emplace_back(int_reg::NumRegs, debug::IntRegs);
    _regClasses.emplace_back(float_reg::NumRegs, debug::FloatRegs);
    _regClasses.emplace_back(1, debug::IntRegs);
    _regClasses.emplace_back(2, debug::IntRegs);
    _regClasses.emplace_back(1, debug::IntRegs);
    _regClasses.emplace_back(0, debug::IntRegs);
    _regClasses.emplace_back(NUM_MISCREGS, debug::MiscRegs);
    clear();
}
 
void
ISA::copyRegsFrom(ThreadContext *src)
{
    // First loop through the integer registers.
    for (int i = 0; i < int_reg::NumRegs; ++i) {
        RegId reg(IntRegClass, i);
        tc->setReg(reg, src->getReg(reg));
    }
 
    // Then loop through the floating point registers.
    for (int i = 0; i < float_reg::NumRegs; ++i) {
        RegId reg(FloatRegClass, i);
        tc->setReg(reg, src->getReg(reg));
    }
 
    //TODO Copy misc. registers
 
    // Lastly copy PC/NPC
    tc->pcState(src->pcState());
}
 
} // namespace PowerISA
} // namespace gem5