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array_range.h
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3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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6  Accellera licenses this file to you under the Apache License, Version 2.0
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20 /*****************************************************************************
21 
22  array_range.h --
23 
24  Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
25 
26  *****************************************************************************/
27 
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29 
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
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33  Name, Affiliation, Date:
34  Description of Modification:
35 
36  *****************************************************************************/
37 
38  /**************************************/
39  /* Interface Filename: array_range.h */
40  /**************************************/
41 
42 #include "common.h"
43 
44 SC_MODULE( array_range )
45 {
46  SC_HAS_PROCESS( array_range );
47 
48  sc_in_clk clk;
49 
50  // Inputs
51  const signal_bool_vector8& in1;
52  // Outputs
58 
59  // Constructor
60  array_range (sc_module_name NAME,
61  sc_clock& TICK,
62  const signal_bool_vector8& IN1,
68 
69  :
70  in1 (IN1),
71  o1 (O1),
72  o2 (O2),
73  o3 (O3),
74  o4 (O4),
75  o5 (O5)
76 
77  {
78  clk (TICK);
79  SC_CTHREAD( entry, clk.pos() );
80  }
81 
82  void entry();
83 };
SC_MODULE(array_range)
Definition: array_range.h:44
constexpr RegId O5
Definition: int.hh:106
constexpr RegId O1
Definition: int.hh:102
constexpr RegId O4
Definition: int.hh:105
constexpr RegId O3
Definition: int.hh:104
constexpr RegId O2
Definition: int.hh:103
sc_in< bool > sc_in_clk
Definition: sc_clock.hh:116
#define SC_CTHREAD(name, clk)
Definition: sc_module.hh:323
#define SC_HAS_PROCESS(name)
Definition: sc_module.hh:301
sc_signal< sc_bv< 8 > > signal_bool_vector8
Definition: common.h:43
sc_signal< bool_vector4 > signal_bool_vector4
Definition: common.h:46

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